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authorAngel Pons <th3fanbus@gmail.com>2020-11-03 00:51:34 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2020-11-24 17:47:29 +0000
commitde50d399a1c6ab163de25fff7740c26b9e9da4ab (patch)
tree550829c375acec32c03e1ae4f0d75c8c82c20fdd /src
parent8e021d96b3c1844093f9d692bd8a30364bd0e9a9 (diff)
mb/**/cmos.layout: Drop copy-pasted `volume` entries
This option only applies to boards using the Lenovo H8 EC code. Change-Id: I3b16a61a0aa9f51a4061b1b5e58fc276e7383415 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47150 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/apple/macbookair4_2/cmos.layout1
-rw-r--r--src/mainboard/hp/snb_ivb_laptops/cmos.layout2
-rw-r--r--src/mainboard/sapphire/pureplatinumh61/cmos.layout2
3 files changed, 0 insertions, 5 deletions
diff --git a/src/mainboard/apple/macbookair4_2/cmos.layout b/src/mainboard/apple/macbookair4_2/cmos.layout
index 6a23ab6853..7f153a0ad7 100644
--- a/src/mainboard/apple/macbookair4_2/cmos.layout
+++ b/src/mainboard/apple/macbookair4_2/cmos.layout
@@ -18,7 +18,6 @@ entries
# coreboot config options: cpu
# coreboot config options: northbridge
#432 5 e 11 gfx_uma_size
-#440 8 h 0 volume
# SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed
928 32 r 0 mrc_scrambler_seed_s3
diff --git a/src/mainboard/hp/snb_ivb_laptops/cmos.layout b/src/mainboard/hp/snb_ivb_laptops/cmos.layout
index 31889ad24b..f7a9390101 100644
--- a/src/mainboard/hp/snb_ivb_laptops/cmos.layout
+++ b/src/mainboard/hp/snb_ivb_laptops/cmos.layout
@@ -28,8 +28,6 @@ entries
# coreboot config options: northbridge
432 3 e 11 gfx_uma_size
-440 8 h 0 volume
-
# SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed
928 32 r 0 mrc_scrambler_seed_s3
diff --git a/src/mainboard/sapphire/pureplatinumh61/cmos.layout b/src/mainboard/sapphire/pureplatinumh61/cmos.layout
index 8a45f420d3..979c8e28ad 100644
--- a/src/mainboard/sapphire/pureplatinumh61/cmos.layout
+++ b/src/mainboard/sapphire/pureplatinumh61/cmos.layout
@@ -15,8 +15,6 @@ entries
# coreboot config options: console
395 4 e 6 debug_level
-400 8 h 0 volume
-
# coreboot config options: southbridge
408 1 e 1 nmi
409 2 e 7 power_on_after_fail