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authorRobert Zieba <robertzieba@google.com>2022-10-04 12:34:40 -0600
committerFelix Held <felix-coreboot@felixheld.de>2023-03-09 19:42:06 +0000
commitdd40122fd611cd53f87a47ae67ed703217e753a6 (patch)
tree63b0e4e12e128a5d112c8d6b8b4aca9a991cca14 /src
parent6998ee069a33ab56307c43a4108276a020fc713f (diff)
mb/google/guybrush: Store XHCI resources
Implement `smm_mainboard_pci_resource_store_init` to store the resources for XHCI devices. These stored resources are later used by the elog code to log XHCI wake events. Example elog contents: ``` 250 | 2022-10-11 16:04:49 | S0ix Enter 251 | 2022-10-11 16:04:53 | S0ix Exit 252 | 2022-10-11 16:04:53 | Wake Source | GPE # | 31 253 | 2022-10-11 16:04:53 | Wake Source | PME - XHCI (USB 2.0 port) | 1 254 | 2022-10-11 16:05:24 | S0ix Enter 255 | 2022-10-11 16:05:27 | S0ix Exit 256 | 2022-10-11 16:05:27 | Wake Source | GPE # | 31 257 | 2022-10-11 16:05:27 | Wake Source | PME - XHCI (USB 2.0 port) | 257 ``` BRANCH=guybrush BUG=b:186792595 TEST=Ran on nipperkin, verified that XHCI wake events show up in elog Change-Id: I1d0911df9e3102791bf7b5723ac38e2ba82a9db6 Signed-off-by: Robert Zieba <robertzieba@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68326 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/guybrush/mainboard.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/google/guybrush/mainboard.c b/src/mainboard/google/guybrush/mainboard.c
index a7eab0804b..71d3ec5087 100644
--- a/src/mainboard/google/guybrush/mainboard.c
+++ b/src/mainboard/google/guybrush/mainboard.c
@@ -5,8 +5,10 @@
#include <amdblocks/acpimmio.h>
#include <amdblocks/amd_pci_util.h>
#include <amdblocks/psp.h>
+#include <amdblocks/xhci.h>
#include <baseboard/variants.h>
#include <console/console.h>
+#include <cpu/x86/smm.h>
#include <device/device.h>
#include <drivers/i2c/tpm/chip.h>
#include <gpio.h>
@@ -186,6 +188,11 @@ static void mainboard_enable(struct device *dev)
pm_write32(PM_ESPI_INTR_CTRL, PM_ESPI_DEV_INTR_MASK & ~(BIT(1)));
}
+void smm_mainboard_pci_resource_store_init(struct smm_pci_resource_info *slots, size_t size)
+{
+ soc_xhci_store_resources(slots, size);
+}
+
struct chip_operations mainboard_ops = {
.init = mainboard_init,
.enable_dev = mainboard_enable,