diff options
| author | Ravi Sarawadi <ravishankar.sarawadi@intel.com> | 2020-10-14 16:30:38 -0700 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-11-05 22:58:27 +0000 |
| commit | d83e24d9d562bf9697a3fb8b02736e09d5cdafb0 (patch) | |
| tree | c516e3f71d4e52d9ea59af55a61ea513a543882e /src | |
| parent | 1032d22152f1889246cda62e767af1da24407089 (diff) | |
soc/intel/tigerlake: Disable C1 C-state Demotion
Disable C1 C-state auto demotion to decrease SoC power usage.
When set, processor will conditionally demote C3/C6/C7 requests
to C1 based on uncore auto-demote information.
BUG=b:161215906
TEST=Measure and confirm SoC power usage reduction for key use cases
eg 'Google Meets video call'
Measured on instrumented boards for Volteer EVT and Delbin.
Below measurements for Volteer:
Google meets with 720p w/ auto-demotion w/o auto-demotion
System Power 13.14W 9.4W
SOC Power 7.9W 5.4W
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Signed-off-by: Shweta Malik <shweta.malik@intel.com>
Change-Id: I649cafbaf03917d76521aa5f76ec58d218e1a1b1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46438
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/tigerlake/fsp_params.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index 887241b5c2..3427a61792 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -365,6 +365,10 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* EnableMultiPhaseSiliconInit for running MultiPhaseSiInit */ params->EnableMultiPhaseSiliconInit = 1; + + /* Disable C1 C-state Demotion */ + params->C1StateAutoDemotion = 0; + mainboard_silicon_init_params(params); } |