mb/google/brya/var/{brya0, brya4es}: Use ACPI _PLD macro

This patch uses ACPI _PLD macros for USB Type A and C ports.

BUG=b:216490477
TEST=emerge-brya coreboot

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I1940246fd88db29054f85c43672adc97dc90fa04
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61823
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

2 files changed, 16 insertions, 96 deletions

diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb
index e7e7f73e8c..9f3e0285a6 100644
--- a/src/mainboard/google/brya/variants/brya0/overridetree.cb
+++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb
@@ -664,36 +664,21 @@ chip soc/intel/alderlake
 						register "desc" = ""USB3 Type-C Port C0 (MLB)""
 						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_LEFT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_CENTER,
-							.shape = PLD_SHAPE_OVAL,
-							.group = ACPI_PLD_GROUP(1, 1)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
 						device ref tcss_usb3_port1 on end
 					end
 					chip drivers/usb/acpi
 						register "desc" = ""USB3 Type-C Port C1 (DB)""
 						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_RIGHT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_OVAL,
-							.group = ACPI_PLD_GROUP(2, 1)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
 						device ref tcss_usb3_port2 on end
 					end
 					chip drivers/usb/acpi
 						register "desc" = ""USB3 Type-C Port C2 (MLB)""
 						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_LEFT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_OVAL,
-							.group = ACPI_PLD_GROUP(3, 1)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
 						device ref tcss_usb3_port3 on end
 					end
 				end
@@ -706,36 +691,21 @@ chip soc/intel/alderlake
 						register "desc" = ""USB2 Type-C Port C0 (MLB)""
 						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_LEFT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_CENTER,
-							.shape = PLD_SHAPE_OVAL,
-							.group = ACPI_PLD_GROUP(1, 1)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
 						device ref usb2_port1 on end
 					end
 					chip drivers/usb/acpi
 						register "desc" = ""USB2 Type-C Port C1 (DB)""
 						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_RIGHT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_OVAL,
-							.group = ACPI_PLD_GROUP(2, 1)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
 						device ref usb2_port2 on end
 					end
 					chip drivers/usb/acpi
 						register "desc" = ""USB2 Type-C Port C2 (MLB)""
 						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_LEFT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_OVAL,
-							.group = ACPI_PLD_GROUP(3, 1)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
 						device ref usb2_port3 on end
 					end
 					chip drivers/usb/acpi
@@ -754,12 +724,7 @@ chip soc/intel/alderlake
 						register "desc" = ""USB2 Type-A Port A0 (DB)""
 						register "type" = "UPC_TYPE_A"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_RIGHT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
-							.group = ACPI_PLD_GROUP(1, 2)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
 						device ref usb2_port9 on end
 					end
 					chip drivers/usb/acpi
@@ -773,12 +738,7 @@ chip soc/intel/alderlake
 						register "desc" = ""USB3 Type-A Port A0 (DB)""
 						register "type" = "UPC_TYPE_USB3_A"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_RIGHT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
-							.group = ACPI_PLD_GROUP(1, 2)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
 						device ref usb3_port1 on end
 					end
 					chip drivers/usb/acpi
diff --git a/src/mainboard/google/brya/variants/brya4es/overridetree.cb b/src/mainboard/google/brya/variants/brya4es/overridetree.cb
index dd5650e5a8..13d028ea69 100644
--- a/src/mainboard/google/brya/variants/brya4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/brya4es/overridetree.cb
@@ -660,36 +660,21 @@ chip soc/intel/alderlake
 						register "desc" = ""USB3 Type-C Port C0 (MLB)""
 						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_LEFT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_CENTER,
-							.shape = PLD_SHAPE_OVAL,
-							.group = ACPI_PLD_GROUP(1, 1)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
 						device ref tcss_usb3_port1 on end
 					end
 					chip drivers/usb/acpi
 						register "desc" = ""USB3 Type-C Port C1 (DB)""
 						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_RIGHT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_OVAL,
-							.group = ACPI_PLD_GROUP(2, 1)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
 						device ref tcss_usb3_port2 on end
 					end
 					chip drivers/usb/acpi
 						register "desc" = ""USB3 Type-C Port C2 (MLB)""
 						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_LEFT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_OVAL,
-							.group = ACPI_PLD_GROUP(3, 1)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
 						device ref tcss_usb3_port3 on end
 					end
 				end
@@ -702,36 +687,21 @@ chip soc/intel/alderlake
 						register "desc" = ""USB2 Type-C Port C0 (MLB)""
 						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_LEFT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_CENTER,
-							.shape = PLD_SHAPE_OVAL,
-							.group = ACPI_PLD_GROUP(1, 1)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
 						device ref usb2_port1 on end
 					end
 					chip drivers/usb/acpi
 						register "desc" = ""USB2 Type-C Port C1 (DB)""
 						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_RIGHT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_OVAL,
-							.group = ACPI_PLD_GROUP(2, 1)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
 						device ref usb2_port2 on end
 					end
 					chip drivers/usb/acpi
 						register "desc" = ""USB2 Type-C Port C2 (MLB)""
 						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_LEFT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_OVAL,
-							.group = ACPI_PLD_GROUP(3, 1)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
 						device ref usb2_port3 on end
 					end
 					chip drivers/usb/acpi
@@ -750,12 +720,7 @@ chip soc/intel/alderlake
 						register "desc" = ""USB2 Type-A Port A0 (DB)""
 						register "type" = "UPC_TYPE_A"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_RIGHT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
-							.group = ACPI_PLD_GROUP(1, 2)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
 						device ref usb2_port9 on end
 					end
 					chip drivers/usb/acpi
@@ -769,12 +734,7 @@ chip soc/intel/alderlake
 						register "desc" = ""USB3 Type-A Port A0 (DB)""
 						register "type" = "UPC_TYPE_USB3_A"
 						register "use_custom_pld" = "true"
-						register "custom_pld" = "{
-							.visible = true,
-							.panel = PLD_PANEL_RIGHT,
-							.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
-							.shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
-							.group = ACPI_PLD_GROUP(1, 2)}"
+						register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
 						device ref usb3_port1 on end
 					end
 					chip drivers/usb/acpi