diff options
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-06-28 12:03:20 -0600 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-07-13 16:08:37 +0000 |
| commit | ce29eab03507754654ebd62210bcaefa0ea5ee1b (patch) | |
| tree | 4fc4d755018ad5bf8d4cd5c72060aee0252aaa58 /src | |
| parent | 7ae8fa538e2aaabb5414e5e90584f9bcb7e6f1e4 (diff) | |
mb/google/brya/acpi: Keep track of dGPU power state
To avoid extraneous calls from the kernel to _ON or _OFF, keep track
of the power state of the GPU in an integer and exit _ON and _OFF
routines early when attempting to enter the current state.
BUG=b:236676400
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Ie874fcdc7022c4fde6f557d1ee06e8392ae3d850
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65482
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Robert Zieba <robertzieba@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/brya/acpi/power.asl | 27 |
1 files changed, 26 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/acpi/power.asl b/src/mainboard/google/brya/acpi/power.asl index 8232a32e56..daaba74385 100644 --- a/src/mainboard/google/brya/acpi/power.asl +++ b/src/mainboard/google/brya/acpi/power.asl @@ -23,7 +23,7 @@ Name (OPCS, OPTIMUS_POWER_CONTROL_DISABLE) /* PCI configuration space Owner */ -Name (PCIO, PCI_OWNER_SBIOS) +Name (PCIO, PCI_OWNER_DRIVER) /* Saved PCI configuration space memory (VGA Buffer) */ Name (VGAB, Buffer (0xfb) { 0x00 }) @@ -34,6 +34,11 @@ Name (OPS0, OPTIMUS_CONTROL_NO_RUN_PS0) /* GC6 Entry/Exit state */ Name (GC6E, GC6_STATE_EXITED) +/* Power State, GCOFF, GCON */ +#define GPU_POWER_STATE_OFF 0 +#define GPU_POWER_STATE_ON 1 +Name (GPPS, GPU_POWER_STATE_ON) + /* Defer GC6 entry / exit until D3-cold request */ Name (DFEN, 0) /* Deferred GC6 Enter control */ @@ -129,6 +134,12 @@ Method (GC6O, 0, Serialized) /* GCOFF exit sequence */ Method (PGON, 0, Serialized) { + If (GPPS == GPU_POWER_STATE_ON) + { + Printf ("PGON: GPU already on") + Return + } + /* Assert PERST# */ \_SB.PCI0.CTXS (GPIO_GPU_PERST_L) @@ -158,17 +169,28 @@ Method (PGON, 0, Serialized) /* Deassert PERST# */ \_SB.PCI0.STXS (GPIO_GPU_PERST_L) + + GC6E = GC6_STATE_EXITED + GPPS = GPU_POWER_STATE_ON + Printf ("GPU Sequenced on") } /* GCOFF entry sequence */ Method (PGOF, 0, Serialized) { + If (GPPS == GPU_POWER_STATE_OFF) + { + Printf ("GPU already off") + Return + } + /* Assert PERST# */ \_SB.PCI0.CTXS (GPIO_GPU_PERST_L) Sleep (5) /* All rails are about to go down */ \_SB.PCI0.CTXS (GPIO_GPU_ALLRAILS_PG) + Sleep (1) /* Ramp down FBVDD (active-low) and let rail discharge to <10% */ \_SB.PCI0.STXS (GPIO_FBVDD_PWR_EN) @@ -193,6 +215,9 @@ Method (PGOF, 0, Serialized) /* Ramp down 1.8V */ \_SB.PCI0.CTXS (GPIO_1V8_PWR_EN) GPPL (GPIO_1V8_PG, 0, 20) + + GPPS = GPU_POWER_STATE_OFF + Printf ("GPU sequenced off") } /* Handle deferred GC6 vs. poweron request */ |