diff options
author | Raul E Rangel <rrangel@chromium.org> | 2021-07-16 12:50:17 -0600 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-07-21 16:43:29 +0000 |
commit | ce291b4327a888920fad453103094630ca247a57 (patch) | |
tree | 70fe7274d6750277d05e259cad4c3c3ad8169dfb /src | |
parent | ca74a8f430d2323ab8e9998cf0d52373ec6d06f1 (diff) |
commonlib/timestamp,amd/common/block/cpu: Add uCode timestamps
This allows keeping track of how long it takes to load the microcode.
BUG=b:179699789
TEST=Boot guybrush
112:started reading uCode 990,448 (10,615)
113:finished reading uCode 991,722 (1,274)
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I86b67cf9d17786a380e90130a8fe424734e64657
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56391
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src')
-rw-r--r-- | src/commonlib/include/commonlib/timestamp_serialized.h | 4 | ||||
-rw-r--r-- | src/soc/amd/common/block/cpu/update_microcode.c | 4 |
2 files changed, 8 insertions, 0 deletions
diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h index 300aa2a37e..75bcccadf3 100644 --- a/src/commonlib/include/commonlib/timestamp_serialized.h +++ b/src/commonlib/include/commonlib/timestamp_serialized.h @@ -54,6 +54,8 @@ enum timestamp_id { TS_END_POSTCAR = 101, TS_DELAY_START = 110, TS_DELAY_END = 111, + TS_READ_UCODE_START = 112, + TS_READ_UCODE_END = 113, /* 500+ reserved for vendorcode extensions (500-600: google/chromeos) */ TS_START_COPYVER = 501, @@ -191,6 +193,8 @@ static const struct timestamp_id_to_name { { TS_SELFBOOT_JUMP, "selfboot jump" }, { TS_DELAY_START, "Forced delay start" }, { TS_DELAY_END, "Forced delay end" }, + { TS_READ_UCODE_START, "started reading uCode" }, + { TS_READ_UCODE_END, "finished reading uCode" }, { TS_START_COPYVER, "starting to load verstage" }, { TS_END_COPYVER, "finished loading verstage" }, diff --git a/src/soc/amd/common/block/cpu/update_microcode.c b/src/soc/amd/common/block/cpu/update_microcode.c index 6d910e7d82..045f9beeec 100644 --- a/src/soc/amd/common/block/cpu/update_microcode.c +++ b/src/soc/amd/common/block/cpu/update_microcode.c @@ -7,6 +7,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/msr.h> #include <cbfs.h> +#include <timestamp.h> _Static_assert(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE_SIZE > 0, "SOC_AMD_COMMON_BLOCK_UCODE_SIZE is not set"); @@ -94,6 +95,7 @@ void amd_update_microcode_from_cbfs(void) /* Cache the buffer so each CPU doesn't need to read the uCode from flash */ if (!cache_valid) { + timestamp_add_now(TS_READ_UCODE_START); ucode_list = cbfs_map("cpu_microcode_blob.bin", &ucode_len); if (!ucode_list) { printk(BIOS_WARNING, "cpu_microcode_blob.bin not found. Skipping updates.\n"); @@ -111,6 +113,8 @@ void amd_update_microcode_from_cbfs(void) cache_valid = true; cbfs_unmap(ucode_list); + + timestamp_add_now(TS_READ_UCODE_END); } apply_microcode_patch(&ucode_cache); |