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authorEric Lai <ericr_lai@compal.corp-partner.google.com>2021-04-06 12:51:45 +0800
committerMartin Roth <martinroth@google.com>2021-04-07 15:15:57 +0000
commitc979dd1e00668b3823ed6a1670f2da205faac472 (patch)
tree7ef64a4b488194f2eee4186fff7d84cb99f16427 /src
parent335bcf23753c0a2e772c1052dbd5c89242d56cef (diff)
mb/google/mancomb: Configure UART0 gpio in early stage
BUG=b:182211161 TEST=builds Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I2d4ec1556ac7136c454eb025ff99aafbf49b8982 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52122 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/mancomb/variants/baseboard/gpio.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/mancomb/variants/baseboard/gpio.c b/src/mainboard/google/mancomb/variants/baseboard/gpio.c
index 5a6f2aca26..1eb1b8064a 100644
--- a/src/mainboard/google/mancomb/variants/baseboard/gpio.c
+++ b/src/mainboard/google/mancomb/variants/baseboard/gpio.c
@@ -166,6 +166,10 @@ static const struct soc_amd_gpio early_gpio_table[] = {
PAD_NF(GPIO_107, SPI2_HOLD_L_ESPI2_D3, PULL_NONE),
/* ESPI_ALERT_L */
PAD_NF(GPIO_108, ESPI_ALERT_D1, PULL_NONE),
+ /* UART0_RXD */
+ PAD_NF(GPIO_141, UART0_RXD, PULL_NONE),
+ /* UART0_TXD */
+ PAD_NF(GPIO_143, UART0_TXD, PULL_NONE),
};
/* GPIO configuration for sleep */