diff options
| author | Chun-Jie Chen <chun-jie.chen@mediatek.corp-partner.google.com> | 2021-11-12 09:42:12 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-11-17 10:31:23 +0000 |
| commit | c7e17bce06f36f52652f9ce0865d7fff38446caa (patch) | |
| tree | 895be9d3490f10128496a362cef6d57e72bf56ef /src | |
| parent | ad5fda5fbf1ce5b1f009930992bb7f8280dd063c (diff) | |
soc/mediatek/mt8186: Add mtcmos init support
Add mtcmos to support display and audio.
TEST=build pass
BUG=b:202871018
Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Change-Id: Ib9d41d47f235376f524c3ff78f1fcc069cbc60cd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59343
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/mediatek/mt8186/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8186/include/soc/spm.h | 18 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8186/mtcmos.c | 23 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8186/spm.c | 2 |
4 files changed, 42 insertions, 2 deletions
diff --git a/src/soc/mediatek/mt8186/Makefile.inc b/src/soc/mediatek/mt8186/Makefile.inc index 92f7e6a306..35f9873d26 100644 --- a/src/soc/mediatek/mt8186/Makefile.inc +++ b/src/soc/mediatek/mt8186/Makefile.inc @@ -40,6 +40,7 @@ ramstage-y += ../common/auxadc.c ramstage-y += emi.c ramstage-y += ../common/flash_controller.c ramstage-y += ../common/gpio.c gpio.c +ramstage-y += ../common/mtcmos.c mtcmos.c ramstage-y += ../common/i2c.c i2c.c ramstage-y += ../common/mcu.c ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c diff --git a/src/soc/mediatek/mt8186/include/soc/spm.h b/src/soc/mediatek/mt8186/include/soc/spm.h index c60d62ba9b..18a97445fa 100644 --- a/src/soc/mediatek/mt8186/include/soc/spm.h +++ b/src/soc/mediatek/mt8186/include/soc/spm.h @@ -10,6 +10,7 @@ #include <device/mmio.h> #include <soc/addressmap.h> +#include <soc/mtcmos.h> #include <types.h> #define SPM_INIT_DONE_US 20 @@ -140,7 +141,7 @@ DEFINE_BIT(SYS_TIMER_START_EN_LSB, 0) PCM_SW_INT0) struct mtk_spm_regs { - uint32_t poweron_config_en; + uint32_t poweron_config_set; uint32_t spm_power_on_val0; uint32_t spm_power_on_val1; uint32_t spm_clk_con; @@ -833,6 +834,8 @@ struct pwr_ctrl { /* Auto-gen End */ }; +check_member(mtk_spm_regs, poweron_config_set, 0x0); +check_member(mtk_spm_regs, dis_pwr_con, 0x354); check_member(mtk_spm_regs, ap_mdsrc_req, 0x430); check_member(mtk_spm_regs, ssusb_top_pwr_con, 0x9F0); check_member(mtk_spm_regs, ssusb_top_p1_pwr_con, 0x9F4); @@ -853,6 +856,19 @@ struct dyna_load_pcm { static struct mtk_spm_regs *const mtk_spm = (void *)SPM_BASE; +static const struct power_domain_data disp[] = { + { + .pwr_con = &mtk_spm->dis_pwr_con, + .pwr_sta_mask = 0x1 << 21, + .sram_pdn_mask = 0x1 << 8, + .sram_ack_mask = 0x1 << 12, + }, +}; + +/* without audio mtcmos control in MT8186 */ +static const struct power_domain_data audio[] = { +}; + int spm_init(void); #endif /* SOC_MEDIATEK_MT8186_SPM_H */ diff --git a/src/soc/mediatek/mt8186/mtcmos.c b/src/soc/mediatek/mt8186/mtcmos.c new file mode 100644 index 0000000000..314edd536e --- /dev/null +++ b/src/soc/mediatek/mt8186/mtcmos.c @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <device/mmio.h> +#include <soc/infracfg.h> +#include <soc/mtcmos.h> + +enum { + DISP_PROT_STEP_2_MASK = 0x00000C06, + DISP_PROT_STEP_1_MASK = 0x00001800, +}; + +void mtcmos_protect_display_bus(void) +{ + write32(&mt8186_infracfg_ao->infra_topaxi_protecten_clr, + DISP_PROT_STEP_2_MASK); + write32(&mt8186_infracfg_ao->infra_topaxi_protecten_1_clr, + DISP_PROT_STEP_1_MASK); +} + +void mtcmos_protect_audio_bus(void) +{ + /* No need to do protection since MT8186 doesn't have audio mtcmos. */ +} diff --git a/src/soc/mediatek/mt8186/spm.c b/src/soc/mediatek/mt8186/spm.c index 41fa913856..bc263eb1e3 100644 --- a/src/soc/mediatek/mt8186/spm.c +++ b/src/soc/mediatek/mt8186/spm.c @@ -384,7 +384,7 @@ static void spm_hw_s1_state_monitor(int en) static void spm_register_init(void) { /* Enable register control */ - write32(&mtk_spm->poweron_config_en, + write32(&mtk_spm->poweron_config_set, SPM_REGWR_CFG_KEY | BCLK_CG_EN_LSB); /* Init power control register */ |