diff options
| author | V Sowmya <v.sowmya@intel.com> | 2022-08-04 22:57:27 +0530 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-08-19 14:28:39 +0000 |
| commit | c2240f124578326ebc76466a645c23773eea98eb (patch) | |
| tree | c09300e5bffdbca0051706c1ce4671ee62e7f273 /src | |
| parent | 2bc54e7c001c2f21752ac2365762a76ff1887b78 (diff) | |
mb/google/nissa: Skip sending the MBP HOB to save boot time
This change is to skip sending the MBP HOB since coreboot doesn't
use it and also helps to reduce the boot time by ~40msec on ADL-N
variants.
Boot time data:
Before:
* 955:returning from FspSiliconInit 1,231,364 (117,051)
After:
* 955:returning from FspSiliconInit 1,198,221 (79,497)
BUG=b:241850107
TEST=Verified that boot time is reduced by ~40msec and also S0i3
is working.
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: Iaeaa8bcdf8467fdd467a10a98dd7582e8e0b067c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66442
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb index 6cc2cb0a17..f0aacb3528 100644 --- a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb @@ -85,6 +85,8 @@ chip soc/intel/alderlake # Disable Package C-state demotion for nissa baseboard. register "disable_package_c_state_demotion" = "1" + register "skip_mbp_hob" = "1" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | |