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authorDavid Hendricks <dhendrix@chromium.org>2013-01-10 15:00:23 -0800
committerDavid Hendricks <dhendrix@chromium.org>2013-01-11 01:06:32 +0100
commitb9fb213f85b9a6c76253c21504c6bfe838670de7 (patch)
tree41973dc9556bd746788759e9bd53d523ddf5d21b /src
parent105da50df4fe6073575a2eb6247d916746b6143e (diff)
exynos5250: Temporarily remove intermediate rule in Makefile
This cannot be used until we get the BL1 mess sorted out. Change-Id: I2490addb31256e27caa89ebb5b1501296e6903bd Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2132 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/cpu/samsung/exynos5250/Makefile.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc
index d419f28edc..1b915a3266 100644
--- a/src/cpu/samsung/exynos5250/Makefile.inc
+++ b/src/cpu/samsung/exynos5250/Makefile.inc
@@ -1,7 +1,7 @@
# Run an intermediate step when producing coreboot.rom
# that adds additional components to the final firmware
# image outside of CBFS
-INTERMEDIATE += exynos5250_add_bl1
+#INTERMEDIATE += exynos5250_add_bl1
romstage-y += clock.c
romstage-y += clock_init.c