diff options
author | TimChu <Tim.Chu@quantatw.com> | 2020-05-20 20:35:39 -0700 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-23 09:12:59 +0000 |
commit | b8d6af9569632745966199a21833f0ad426ca140 (patch) | |
tree | 51da9a3c493ba124fdd7a680c6dd12e5900b6603 /src | |
parent | 9862138b67a1db212a0569b5998281fda35450a6 (diff) |
mb/ocp/deltalake: Add ipmi POST start command in romstage
Add function to send POST start command to BMC. This function is
used in romstage and the POST end command will be sent in u-root.
TEST=Read POST command log in OpenBMC,
if command received successfully, message may show as below,
root@bmc-oob:~# cat /var/log/messages |grep -i "POST"
2020 Jul 15 16:36:11 bmc-oob. user.info fby3-v2020.23.1:
ipmid: POST Start Event for Payload#2
root@bmc-oob:~#
Signed-off-by: TimChu <Tim.Chu@quantatw.com>
Change-Id: Ide0e2a52876db555ed8b5e919215e85731fd80ed
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41605
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/ocp/deltalake/ipmi.c | 23 | ||||
-rw-r--r-- | src/mainboard/ocp/deltalake/ipmi.h | 2 | ||||
-rw-r--r-- | src/mainboard/ocp/deltalake/romstage.c | 4 |
3 files changed, 28 insertions, 1 deletions
diff --git a/src/mainboard/ocp/deltalake/ipmi.c b/src/mainboard/ocp/deltalake/ipmi.c index acff3dba4a..9c5a0c0cfe 100644 --- a/src/mainboard/ocp/deltalake/ipmi.c +++ b/src/mainboard/ocp/deltalake/ipmi.c @@ -75,6 +75,29 @@ enum cb_err ipmi_get_slot_id(uint8_t *slot_id) return CB_SUCCESS; } +enum cb_err ipmi_set_post_start(const int port) +{ + int ret; + struct ipmi_rsp rsp; + + ret = ipmi_kcs_message(port, IPMI_NETFN_OEM, 0x0, + IPMI_BMC_SET_POST_START, NULL, 0, (u8 *) &rsp, + sizeof(rsp)); + + if (ret < sizeof(struct ipmi_rsp) || rsp.completion_code) { + printk(BIOS_ERR, "IPMI: %s command failed (ret=%d rsp=0x%x)\n", + __func__, ret, rsp.completion_code); + return CB_ERR; + } + if (ret != sizeof(rsp)) { + printk(BIOS_ERR, "IPMI: %s response truncated\n", __func__); + return CB_ERR; + } + + printk(BIOS_DEBUG, "IPMI BMC POST is started\n"); + return CB_SUCCESS; +} + void init_frb2_wdt(void) { char val[VPD_LEN]; diff --git a/src/mainboard/ocp/deltalake/ipmi.h b/src/mainboard/ocp/deltalake/ipmi.h index 840f999990..bb0b4a6e04 100644 --- a/src/mainboard/ocp/deltalake/ipmi.h +++ b/src/mainboard/ocp/deltalake/ipmi.h @@ -9,6 +9,7 @@ #define IPMI_OEM_SET_PPIN 0x77 #define IPMI_OEM_GET_PCIE_CONFIG 0xf4 #define IPMI_OEM_GET_BOARD_ID 0x37 +#define IPMI_BMC_SET_POST_START 0x73 enum config_type { PCIE_CONFIG_UNKNOWN = 0x0, @@ -28,5 +29,6 @@ struct ppin_req { enum cb_err ipmi_set_ppin(struct ppin_req *req); enum cb_err ipmi_get_pcie_config(uint8_t *config); enum cb_err ipmi_get_slot_id(uint8_t *slot_id); +enum cb_err ipmi_set_post_start(const int port); void init_frb2_wdt(void); #endif diff --git a/src/mainboard/ocp/deltalake/romstage.c b/src/mainboard/ocp/deltalake/romstage.c index 52679df25c..b366fd9cde 100644 --- a/src/mainboard/ocp/deltalake/romstage.c +++ b/src/mainboard/ocp/deltalake/romstage.c @@ -117,8 +117,10 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) { /* Since it's the first IPMI command, it's better to run get BMC selftest result first */ - if (ipmi_kcs_premem_init(CONFIG_BMC_KCS_BASE, 0) == CB_SUCCESS) + if (ipmi_kcs_premem_init(CONFIG_BMC_KCS_BASE, 0) == CB_SUCCESS) { + ipmi_set_post_start(CONFIG_BMC_KCS_BASE); init_frb2_wdt(); + } mainboard_config_gpios(mupd); mainboard_config_iio(mupd); |