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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-07-15 13:03:11 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-07-17 19:25:34 +0000 |
commit | b6a0fe59fc19301090c928661904b290ce004ad0 (patch) | |
tree | 03d72731470d0633a89f8ec47fd3b03527a09b80 /src | |
parent | 0755ab98a5f0d6632a4fc856d8812f5e70983a13 (diff) |
AGESA boards: Fix regressions with LATE_CBMEM_INIT
Some configurations of AGESA boards fail to boot after commit
61be360 AGESA: Fix UMA calculations
Implementation of cbmem_find() for ENV_ROMSTAGE expects
that CBMEM has already been initialized. In the case of
LATE_CBMEM_INIT boards, this is not the case and cbmem_top()
returned NULL prior to the offending commmit.
By definition LATE_CBMEM_INIT does not have known cbmem_top()
in ENV_ROMSTAGE except for possible ACPI S3 resume path.
Change-Id: Icb8f44661d479e5ad43b123600305dcbc3ce11e1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20590
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/x86/cbmem.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/arch/x86/cbmem.c b/src/arch/x86/cbmem.c index 57ed83b5ca..6a353bd324 100644 --- a/src/arch/x86/cbmem.c +++ b/src/arch/x86/cbmem.c @@ -45,6 +45,10 @@ void set_late_cbmem_top(uintptr_t ramtop) /* Top of CBMEM is at highest usable DRAM address below 4GiB. */ uintptr_t __attribute__((weak)) restore_cbmem_top(void) { + if (IS_ENABLED(CONFIG_LATE_CBMEM_INIT) && ENV_ROMSTAGE) + if (!acpi_is_wakeup_s3()) + return 0; + return restore_top_of_low_cacheable(); } |