diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2021-04-20 22:40:25 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-04-21 22:12:28 +0000 |
commit | b5c2350145c8e757e60df8b5158d0e2e8307d37d (patch) | |
tree | 6599c7cdae20c5d7d184ceb8de3f22da996c8c13 /src | |
parent | 78903802662eb72de126688bf1e974a3044f4de9 (diff) |
soc/amd/picasso/chip.h: use boolean type for smt_disable
Even though the UPD field this information is finally written to is an 8
bit value, the smt_disable option is only a boolean.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Iaac49944993a28ffb98a80201effe1238ec60875
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52553
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/amd/picasso/chip.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h index 4329bdd4ed..e357f549c4 100644 --- a/src/soc/amd/picasso/chip.h +++ b/src/soc/amd/picasso/chip.h @@ -146,7 +146,7 @@ struct soc_amd_picasso_config { DOWNCORE_2 = 3, /* Run with two cores */ DOWNCORE_3 = 4, /* Run with three cores */ } downcore_mode; - uint8_t smt_disable; /* 1=disable SMT, 0=enable SMT */ + bool smt_disable; /* true=disable SMT on all physical cores */ /* Lower die temperature limit */ uint32_t thermctl_limit_degreeC; |