diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2023-10-28 11:16:14 -0500 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-10-31 16:42:31 +0000 |
| commit | af46b4786f9776d22dacb41e7fed4e52d0cf98e4 (patch) | |
| tree | 769b4e067794b4678a96626c0bd88b99822b92d1 /src | |
| parent | 7065ea3487a8b889807985a98c68ecf9724de0ba (diff) | |
mb/google/brya/var/*: Mark fingerprint reader as hidden
Windows doesn't have / will likely never have a signed driver for the
FPR, so set the device status as hidden so it will not appear as an
unknown device in Windows Device Manager. Linux does not check/care
about the ACPI device status.
TEST=build/boot Win11 on google/brya (kano), verify FPR does not show
up as unknown device under Device Manager.
Change-Id: Ie73fd9d448ecca9e9112abc0d92b4ab46ce3618d
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78811
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Diffstat (limited to 'src')
19 files changed, 19 insertions, 19 deletions
diff --git a/src/mainboard/google/brya/variants/anahera/overridetree.cb b/src/mainboard/google/brya/variants/anahera/overridetree.cb index 9a09072ac6..0a72246e12 100644 --- a/src/mainboard/google/brya/variants/anahera/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera/overridetree.cb @@ -327,7 +327,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb index 421514d72f..ed4037e378 100644 --- a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb @@ -309,7 +309,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/brask/overridetree.cb b/src/mainboard/google/brya/variants/brask/overridetree.cb index b2169c35a9..995f20ca36 100644 --- a/src/mainboard/google/brya/variants/brask/overridetree.cb +++ b/src/mainboard/google/brya/variants/brask/overridetree.cb @@ -153,7 +153,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index f0b6c694c0..d7eadbe4be 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -1065,7 +1065,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/crota/overridetree.cb b/src/mainboard/google/brya/variants/crota/overridetree.cb index d4ce367271..b3cab3cf5d 100644 --- a/src/mainboard/google/brya/variants/crota/overridetree.cb +++ b/src/mainboard/google/brya/variants/crota/overridetree.cb @@ -322,7 +322,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/gimble/overridetree.cb b/src/mainboard/google/brya/variants/gimble/overridetree.cb index 2b4a5aba1a..b35a64f828 100644 --- a/src/mainboard/google/brya/variants/gimble/overridetree.cb +++ b/src/mainboard/google/brya/variants/gimble/overridetree.cb @@ -261,7 +261,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/gimble4es/overridetree.cb b/src/mainboard/google/brya/variants/gimble4es/overridetree.cb index 90afbb0eac..196212718e 100644 --- a/src/mainboard/google/brya/variants/gimble4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/gimble4es/overridetree.cb @@ -225,7 +225,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/kano/overridetree.cb b/src/mainboard/google/brya/variants/kano/overridetree.cb index d5cf7c38f6..8ef5ed2574 100644 --- a/src/mainboard/google/brya/variants/kano/overridetree.cb +++ b/src/mainboard/google/brya/variants/kano/overridetree.cb @@ -486,7 +486,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/marasov/overridetree.cb b/src/mainboard/google/brya/variants/marasov/overridetree.cb index ce86d763cb..7fd0ef1f3b 100644 --- a/src/mainboard/google/brya/variants/marasov/overridetree.cb +++ b/src/mainboard/google/brya/variants/marasov/overridetree.cb @@ -354,7 +354,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/primus/overridetree.cb b/src/mainboard/google/brya/variants/primus/overridetree.cb index e42480e822..a06578d816 100644 --- a/src/mainboard/google/brya/variants/primus/overridetree.cb +++ b/src/mainboard/google/brya/variants/primus/overridetree.cb @@ -314,7 +314,7 @@ chip soc/intel/alderlake register "compat_string" = ""google,cros-ec-spi"" register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)" register "wake" = "GPE0_DW2_15" - device spi 0 on end + device spi 0 hidden end register "has_power_resource" = "1" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" diff --git a/src/mainboard/google/brya/variants/primus4es/overridetree.cb b/src/mainboard/google/brya/variants/primus4es/overridetree.cb index 559d16c12d..baec228750 100644 --- a/src/mainboard/google/brya/variants/primus4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/primus4es/overridetree.cb @@ -308,7 +308,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb index f5556f0527..73016151df 100644 --- a/src/mainboard/google/brya/variants/redrix/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb @@ -495,7 +495,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb index b16c3ff5cf..1a619f8202 100644 --- a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb @@ -494,7 +494,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/skolas/overridetree.cb b/src/mainboard/google/brya/variants/skolas/overridetree.cb index 70b00058a5..388ea4f053 100644 --- a/src/mainboard/google/brya/variants/skolas/overridetree.cb +++ b/src/mainboard/google/brya/variants/skolas/overridetree.cb @@ -989,7 +989,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/skolas4es/overridetree.cb b/src/mainboard/google/brya/variants/skolas4es/overridetree.cb index 0d6eacbb5e..b020d012ac 100644 --- a/src/mainboard/google/brya/variants/skolas4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/skolas4es/overridetree.cb @@ -769,7 +769,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb index 44221919b9..744a8707bf 100644 --- a/src/mainboard/google/brya/variants/taeko/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb @@ -578,7 +578,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb index 9c2d8da19f..a2c79d5212 100644 --- a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb @@ -438,7 +438,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb index 31cc240955..30df62aa27 100644 --- a/src/mainboard/google/brya/variants/vell/overridetree.cb +++ b/src/mainboard/google/brya/variants/vell/overridetree.cb @@ -433,7 +433,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/zydron/overridetree.cb b/src/mainboard/google/brya/variants/zydron/overridetree.cb index 7957cca305..f0d4d05cb6 100644 --- a/src/mainboard/google/brya/variants/zydron/overridetree.cb +++ b/src/mainboard/google/brya/variants/zydron/overridetree.cb @@ -464,7 +464,7 @@ chip soc/intel/alderlake register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on |