diff options
author | Daisuke Nojiri <dnojiri@chromium.org> | 2014-10-23 12:39:11 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-10 07:42:25 +0200 |
commit | af3b2a1873f20cbffb2cf3b585d5020dc1e594fc (patch) | |
tree | 0503c12e7c6f3e28dc1987341ffd568b26d99529 /src | |
parent | 37083903ff94510bc8f656d3b596efcf5225b8c5 (diff) |
armv7-m: add empty cache routines
armv7-m does not have cache but adding empty cache functions allow us to
transparently use code handling entering and leaving stages.
BUG=none
BRANCH=ToT
TEST=Built coreboot for cosmos
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I23415b273c90401cd81f2bc94b2d69958f134c6a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 960453bf5d5fbf7dc75343b1cccaa62b6b8ec30c
Original-Change-Id: Ief0c8a949e7e14d68473e7a093a8642d6058ccc6
Original-Reviewed-on: https://chromium-review.googlesource.com/225206
Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9383
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/arm/armv7/Makefile.inc | 3 | ||||
-rw-r--r-- | src/arch/arm/armv7/cache_m.c | 79 |
2 files changed, 81 insertions, 1 deletions
diff --git a/src/arch/arm/armv7/Makefile.inc b/src/arch/arm/armv7/Makefile.inc index 951118a2d7..ab7f554bf3 100644 --- a/src/arch/arm/armv7/Makefile.inc +++ b/src/arch/arm/armv7/Makefile.inc @@ -52,8 +52,9 @@ bootblock-S-ccopts += $(armv7-m_asm_flags) ifneq ($(CONFIG_ARM_BOOTBLOCK_CUSTOM),y) bootblock-y += bootblock_simple.c -bootblock-y += exception_m.c endif +bootblock-y += exception_m.c +bootblock-y += cache_m.c endif # CONFIG_ARCH_BOOTBLOCK_ARMV7 diff --git a/src/arch/arm/armv7/cache_m.c b/src/arch/arm/armv7/cache_m.c new file mode 100644 index 0000000000..ec8a970167 --- /dev/null +++ b/src/arch/arm/armv7/cache_m.c @@ -0,0 +1,79 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * cache.c: Cache maintenance routines for ARMv7-M + */ + +#include <stdint.h> + +#include <arch/cache.h> + +void tlb_invalidate_all(void) +{ +} + +void dcache_clean_all(void) +{ +} + +void dcache_clean_invalidate_all(void) +{ +} + +void dcache_invalidate_all(void) +{ +} + +unsigned int dcache_line_bytes(void) +{ + return 0; +} + +void dcache_clean_by_mva(void const *addr, size_t len) +{ +} + +void dcache_clean_invalidate_by_mva(void const *addr, size_t len) +{ +} + +void dcache_invalidate_by_mva(void const *addr, size_t len) +{ +} + +void dcache_mmu_disable(void) +{ +} + +void dcache_mmu_enable(void) +{ +} + +void cache_sync_instructions(void) +{ +} |