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authorArthur Heymans <arthur@aheymans.xyz>2022-02-18 13:38:37 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-03-25 19:25:56 +0000
commitab205430751321278b4f0e568d7dcdd46f77a136 (patch)
tree05e82060bd981fe595b243cf7b0e292b8be7ac42 /src
parent3068d562aeb0b065d01e2d0f728a9f5c91ce434d (diff)
soc/mediatek/i2c.c: Remove unused variables
Change-Id: Iaa643feb76530cc74acf4d714d8a7f96709be1cf Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63023 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/mediatek/common/i2c.c9
1 files changed, 0 insertions, 9 deletions
diff --git a/src/soc/mediatek/common/i2c.c b/src/soc/mediatek/common/i2c.c
index b4386b96fb..ab7b0def1c 100644
--- a/src/soc/mediatek/common/i2c.c
+++ b/src/soc/mediatek/common/i2c.c
@@ -496,7 +496,6 @@ void mtk_i2c_speed_init(uint8_t bus, uint32_t speed)
uint32_t max_clk_div = MAX_CLOCK_DIV;
uint32_t clk_src, clk_div, step_cnt, sample_cnt;
uint32_t l_step_cnt, l_sample_cnt;
- uint32_t timing_reg_value, ltiming_reg_value;
struct mtk_i2c *bus_ctrl;
if (bus >= I2C_BUS_NUMBER) {
@@ -516,27 +515,19 @@ void mtk_i2c_speed_init(uint8_t bus, uint32_t speed)
&l_step_cnt, &l_sample_cnt))
continue;
- timing_reg_value = (l_sample_cnt << 8) | l_step_cnt;
-
/* Set the high speed mode register */
if (mtk_i2c_calculate_speed(bus, clk_src, speed,
&step_cnt, &sample_cnt))
continue;
- ltiming_reg_value = (l_sample_cnt << 6) | l_step_cnt |
- (sample_cnt << 12) | (step_cnt << 9);
bus_ctrl->ac_timing.inter_clk_div = (clk_div - 1) << 8 | (clk_div - 1);
} else {
if (mtk_i2c_calculate_speed(bus, clk_src, speed,
&l_step_cnt, &l_sample_cnt))
continue;
- timing_reg_value = (l_sample_cnt << 8) | l_step_cnt;
-
/* Disable the high speed transaction */
bus_ctrl->ac_timing.hs = I2C_TIME_CLR_VALUE;
-
- ltiming_reg_value = (l_sample_cnt << 6) | l_step_cnt;
}
break;