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authorArthur Heymans <arthur@aheymans.xyz>2021-06-12 22:45:38 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-06-23 14:35:27 +0000
commitab090a11ee2b716430286e711efaff8e49ef444b (patch)
tree091527989bfd7837305accbdc9c103401060c900 /src
parent6cd4cfa30dd78a19f7417b2f92e7878a7c7c1029 (diff)
mb/{fb/fbg1701,portwell/m107}: Don't select HAVE_FSP_BIN
This selected by default if 3rdparty/fsp is used. There is no need to override this behavior in the mainboard Kconfig. Change-Id: I01ee2e90e0eceaa3100d911b5460cf99f413b185 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55453 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/facebook/fbg1701/Kconfig1
-rw-r--r--src/mainboard/portwell/m107/Kconfig1
2 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/facebook/fbg1701/Kconfig b/src/mainboard/facebook/fbg1701/Kconfig
index a2c5bc46f1..0b1633e096 100644
--- a/src/mainboard/facebook/fbg1701/Kconfig
+++ b/src/mainboard/facebook/fbg1701/Kconfig
@@ -15,7 +15,6 @@ config BOARD_SPECIFIC_OPTIONS
select SOC_INTEL_BRASWELL
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select PCIEXP_L1_SUB_STATE
- select HAVE_FSP_BIN
select DISABLE_HPET
select INTEL_GMA_HAVE_VBT
select HAVE_SPD_IN_CBFS
diff --git a/src/mainboard/portwell/m107/Kconfig b/src/mainboard/portwell/m107/Kconfig
index 59a4bddb75..c4a903de83 100644
--- a/src/mainboard/portwell/m107/Kconfig
+++ b/src/mainboard/portwell/m107/Kconfig
@@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS
select HAVE_OPTION_TABLE
select SOC_INTEL_BRASWELL
select PCIEXP_L1_SUB_STATE
- select HAVE_FSP_BIN
select DISABLE_HPET
select HAVE_SPD_IN_CBFS