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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-12-24 17:58:44 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-12-24 17:58:44 +0000
commita2f722abd40f6f946c1e45f2844b6cb4b29c68c7 (patch)
tree5d054e1e5c9bee53adc4a54d9c7cbf2865873c11 /src
parent1cced2fe70a3f978a669ba71261406045597f55d (diff)
Fix implicit declarations in the AMD DBM690T target by using the right
header files. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Zheng Bao <Zheng.bao@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3843 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/amd/dbm690t/fadt.c2
-rw-r--r--src/mainboard/amd/dbm690t/mainboard.c3
2 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/amd/dbm690t/fadt.c b/src/mainboard/amd/dbm690t/fadt.c
index cf0a370be1..e7bc017bbd 100644
--- a/src/mainboard/amd/dbm690t/fadt.c
+++ b/src/mainboard/amd/dbm690t/fadt.c
@@ -25,6 +25,8 @@
#include <console/console.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/device.h>
+#include <../southbridge/amd/sb600/sb600.h>
/*extern*/ u16 pm_base = 0x800;
/* pm_base should be set in sb acpi */
diff --git a/src/mainboard/amd/dbm690t/mainboard.c b/src/mainboard/amd/dbm690t/mainboard.c
index 72bf04bd29..903e3a7c75 100644
--- a/src/mainboard/amd/dbm690t/mainboard.c
+++ b/src/mainboard/amd/dbm690t/mainboard.c
@@ -25,6 +25,7 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <device/pci_def.h>
+#include <../southbridge/amd/sb600/sb600.h>
#include "chip.h"
#define ADT7461_ADDRESS 0x4C
@@ -34,6 +35,8 @@
extern int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address);
extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address,
u8 val);
+extern void lb_add_memory_range(struct lb_memory *mem, uint32_t type,
+ uint64_t start, uint64_t size);
#define ADT7461_read_byte(address) \
do_smbus_read_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address)
#define ARA_read_byte(address) \