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authorAnand Vaikar <a.vaikar2021@gmail.com>2023-07-14 11:38:07 +0530
committerMartin L Roth <gaumless@gmail.com>2023-07-17 03:31:31 +0000
commit9922a8b36330c7ba0372e6f0915c3238d89cd594 (patch)
treea0f75c51bc55aabf45d6e7e90ad2158b7a7e0a78 /src
parent854491db63c9eb90a82d8453ea4ca5b97386567c (diff)
mb/amd/mayan: Enable the PCIe bridge for DT/M.2 SSD1 slots
Change-Id: I5c5b125ac03e07a22bcc15ad2d34c62edf74ee04 Signed-off-by: Anand Vaikar <a.vaikar2021@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76452 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/amd/mayan/devicetree_phoenix.cb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/amd/mayan/devicetree_phoenix.cb b/src/mainboard/amd/mayan/devicetree_phoenix.cb
index 3a6d76cd83..898a592261 100644
--- a/src/mainboard/amd/mayan/devicetree_phoenix.cb
+++ b/src/mainboard/amd/mayan/devicetree_phoenix.cb
@@ -188,6 +188,7 @@ chip soc/amd/phoenix
device domain 0 on
device ref iommu on end
device ref gpp_bridge_1_1 on end # MXM
+ device ref gpp_bridge_1_2 on end # DT/M.2 SSD1
device ref gpp_bridge_2_1 on end # GBE
device ref gpp_bridge_2_2 on end # WIFI
device ref gpp_bridge_2_4 on end # NVMe SSD