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authorMartin Roth <martinroth@google.com>2017-11-07 14:08:02 -0700
committerMartin Roth <martinroth@google.com>2017-11-09 17:23:24 +0000
commit95afc463824db373333ac80656b00d7ee05eaa4f (patch)
tree4cf07118e240e219c9e5c7bddfd2a155d227f344 /src
parent07132a4c3202de9f5affe10d90f481b9bd41afc7 (diff)
mainboard/google/kahlee: Define MEM_CONFIG3 for Kahlee variant
Even though this GPIO isn't used for Kahlee, it needs to be defined so that the weak version of the variant_board_id() function can compile. BUG=b:68293392 TEST=Build and boot kahlee Change-Id: Ia8daf70fbafe02ec37c6b5eb8421cdb11de3be8b Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/22371 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h b/src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h
index dfb6354a3e..28643fb08a 100644
--- a/src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h
+++ b/src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h
@@ -22,6 +22,12 @@
#define MEM_CONFIG0 GPIO_135
#define MEM_CONFIG1 GPIO_140
#define MEM_CONFIG2 GPIO_144
+/*
+ * Kahlee only uses 3 GPIOs to determine memory configuration, but other
+ * variants use 4. MEM_CONFIG3 must be defined so that the weak baseboard
+ * version of the variant_board_id() function can compile.
+ */
+#define MEM_CONFIG3 0
/* SPI Write protect */
#define CROS_WP_GPIO GPIO_142