diff options
| author | Tan, Lean Sheng <lean.sheng.tan@intel.com> | 2020-09-03 06:40:46 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-08 05:30:08 +0000 |
| commit | 9440c5356762b94c019d2399d6cddbd61fba96c9 (patch) | |
| tree | d9239a6a642c0144929238afaa9b5cdd39e235fb /src | |
| parent | 70a2ddc5ac6c8f7d49b9bc2075373772286faf7b (diff) | |
soc/intel/elkhartlake: Add CPU, SA, PCH & IGD DIDs Table
1. Add CPU, SA, PCH & IGD DIDs table into report_platform.c
2. Add additional EHL SA DID in pci_ids.h
Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com>
Change-Id: I5c98089873b17f82560eba13c7de3353b6d3e249
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45074
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/include/device/pci_ids.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/elkhartlake/bootblock/report_platform.c | 53 |
2 files changed, 51 insertions, 3 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 5aaf7b3995..9ef6f0a3b7 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3725,6 +3725,7 @@ #define PCI_DEVICE_ID_INTEL_EHL_ID_10 0x452C #define PCI_DEVICE_ID_INTEL_EHL_ID_11 0x452E #define PCI_DEVICE_ID_INTEL_EHL_ID_12 0x4518 +#define PCI_DEVICE_ID_INTEL_EHL_ID_13 0x451A #define PCI_DEVICE_ID_INTEL_JSL_ID_1 0x4e22 #define PCI_DEVICE_ID_INTEL_JSL_ID_2 0x4e26 #define PCI_DEVICE_ID_INTEL_JSL_ID_3 0x4e12 diff --git a/src/soc/intel/elkhartlake/bootblock/report_platform.c b/src/soc/intel/elkhartlake/bootblock/report_platform.c index 82b2ba1134..b1b7fe8524 100644 --- a/src/soc/intel/elkhartlake/bootblock/report_platform.c +++ b/src/soc/intel/elkhartlake/bootblock/report_platform.c @@ -14,9 +14,56 @@ #include <soc/pci_devs.h> #include <string.h> -/* - * TODO: Add EHL specific CPU/SA/PCH/IGD IDs here - */ +static struct { + uint32_t cpuid; + const char *name; +} cpu_table[] = { + { CPUID_ELKHARTLAKE_A0, "Elkhartlake A0" }, + { CPUID_ELKHARTLAKE_B0, "Elkhartlake B0" }, +}; + +static struct { + u16 mchid; + const char *name; +} mch_table[] = { + { PCI_DEVICE_ID_INTEL_EHL_ID_1, "Elkhartlake SKU-0" }, + { PCI_DEVICE_ID_INTEL_EHL_ID_2, "Elkhartlake SKU-1" }, + { PCI_DEVICE_ID_INTEL_EHL_ID_3, "Elkhartlake SKU-2" }, + { PCI_DEVICE_ID_INTEL_EHL_ID_4, "Elkhartlake SKU-3" }, + { PCI_DEVICE_ID_INTEL_EHL_ID_5, "Elkhartlake SKU-4" }, + { PCI_DEVICE_ID_INTEL_EHL_ID_6, "Elkhartlake SKU-5" }, + { PCI_DEVICE_ID_INTEL_EHL_ID_7, "Elkhartlake SKU-6" }, + { PCI_DEVICE_ID_INTEL_EHL_ID_8, "Elkhartlake SKU-7" }, + { PCI_DEVICE_ID_INTEL_EHL_ID_9, "Elkhartlake SKU-8" }, + { PCI_DEVICE_ID_INTEL_EHL_ID_10, "Elkhartlake SKU-9" }, + { PCI_DEVICE_ID_INTEL_EHL_ID_11, "Elkhartlake SKU-10" }, + { PCI_DEVICE_ID_INTEL_JSL_EHL, "Elkhartlake SKU-11" }, + { PCI_DEVICE_ID_INTEL_EHL_ID_12, "Elkhartlake SKU-12" }, + { PCI_DEVICE_ID_INTEL_EHL_ID_13, "Elkhartlake SKU-13" }, +}; + +static struct { + u16 espiid; + const char *name; +} pch_table[] = { + { PCI_DEVICE_ID_INTEL_MCC_ESPI_0, "Elkhartlake-0" }, + { PCI_DEVICE_ID_INTEL_MCC_ESPI_1, "Elkhartlake-1" }, + { PCI_DEVICE_ID_INTEL_MCC_BASE_ESPI, "Elkhartlake Base" }, + { PCI_DEVICE_ID_INTEL_MCC_PREMIUM_ESPI, "Elkhartlake Premium" }, + { PCI_DEVICE_ID_INTEL_MCC_SUPER_ESPI, "Elkhartlake Super" }, +}; + +static struct { + u16 igdid; + const char *name; +} igd_table[] = { + { PCI_DEVICE_ID_INTEL_EHL_GT1_1, "Elkhartlake GT1-1" }, + { PCI_DEVICE_ID_INTEL_EHL_GT2_1, "Elkhartlake GT2-1" }, + { PCI_DEVICE_ID_INTEL_EHL_GT1_2, "Elkhartlake GT1-2" }, + { PCI_DEVICE_ID_INTEL_EHL_GT2_2, "Elkhartlake GT2-2" }, + { PCI_DEVICE_ID_INTEL_EHL_GT1_3, "Elkhartlake GT1-3" }, + { PCI_DEVICE_ID_INTEL_EHL_GT2_3, "Elkhartlake GT2-3" }, +}; static inline uint8_t get_dev_revision(pci_devfn_t dev) { |