diff options
author | Yinghai Lu <yinghailu@gmail.com> | 2004-11-02 02:34:28 +0000 |
---|---|---|
committer | Yinghai Lu <yinghailu@gmail.com> | 2004-11-02 02:34:28 +0000 |
commit | 9434c1b661506e9f0b77896c87c36b39b9137da9 (patch) | |
tree | 25716c89eb9b6b30c0ede400a5d5a9793558ba2a /src | |
parent | 097996973221f442d2690ccfd0769b26f0a65a30 (diff) |
Tyan update for ROM_IMAGE_SIZE > 64K
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1730 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
35 files changed, 343 insertions, 212 deletions
diff --git a/src/mainboard/tyan/s2850/Config.lb b/src/mainboard/tyan/s2850/Config.lb index 123270cca9..061dd26ad6 100644 --- a/src/mainboard/tyan/s2850/Config.lb +++ b/src/mainboard/tyan/s2850/Config.lb @@ -47,22 +47,22 @@ if HAVE_PIRQ_TABLE object irq_tables.o end ## Romcc output ## makerule ./failover.E - depends "$(MAINBOARD)/failover.c" - action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./failover.inc - depends "./failover.E ./romcc" - action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end -makerule ./auto.E - depends "$(MAINBOARD)/auto.c option_table.h " - action "$(CPP) -I$(TOP)/src -I. $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E" +makerule ./auto.E + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end -makerule ./auto.inc - depends "./auto.E ./romcc" - action "./romcc -mcpu=k8 -O2 ./auto.E > auto.inc" +makerule ./auto.inc + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end ## @@ -162,14 +162,21 @@ chip northbridge/amd/amdk8 irq 0x70 = 1 irq 0x72 = 12 end - device pnp 2e.6 off end # CIR - device pnp 2e.7 off end # GAME_MIDI_GIPO1 - device pnp 2e.8 off end # GPIO2 - device pnp 2e.9 off end # GPIO3 - device pnp 2e.a off end # ACPI - device pnp 2e.b on # HW Monitor - io 0x60 = 0x290 - end + device pnp 2e.6 off # CIR + io 0x60 = 0x100 + end + device pnp 2e.7 off # GAME_MIDI_GIPO1 + io 0x60 = 0x201 + io 0x62 = 0x330 + irq 0x70 = 9 + end + device pnp 2e.8 off end # GPIO2 + device pnp 2e.9 off end # GPIO3 + device pnp 2e.a off end # ACPI + device pnp 2e.b on # HW Monitor + io 0x60 = 0x290 + irq 0x70 = 5 + end end end device pci 1.1 on end diff --git a/src/mainboard/tyan/s2850/Options.lb b/src/mainboard/tyan/s2850/Options.lb index 8df51d4dbc..4c0dae6875 100644 --- a/src/mainboard/tyan/s2850/Options.lb +++ b/src/mainboard/tyan/s2850/Options.lb @@ -32,6 +32,8 @@ uses LB_CKS_LOC uses MAINBOARD_PART_NUMBER uses MAINBOARD_VENDOR uses MAINBOARD +uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID +uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID uses LINUXBIOS_EXTRA_VERSION uses _RAMBASE uses CC @@ -43,7 +45,8 @@ uses DEFAULT_CONSOLE_LOGLEVEL uses MAXIMUM_CONSOLE_LOGLEVEL uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_SERIAL8250 - +uses HAVE_INIT_TIMER +uses CONFIG_GDB_STUB ### ### Build options @@ -80,7 +83,7 @@ default HARD_RESET_FUNCTION=0 ## Build code to export a programmable irq routing table ## default HAVE_PIRQ_TABLE=1 -default IRQ_SLOT_COUNT=9 +default IRQ_SLOT_COUNT=12 ## ## Build code to export an x86 MP table @@ -117,6 +120,8 @@ default CONFIG_IOAPIC=1 ## default MAINBOARD_PART_NUMBER="Tyan" default MAINBOARD_VENDOR="s2850" +default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1 +default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2850 ### ### LinuxBIOS layout values @@ -161,6 +166,11 @@ default CC="gcc" default HOSTCC="gcc" ## +## Disable the gdb stub by default +## +default CONFIG_GDB_STUB=0 + +## ## The Serial Console ## diff --git a/src/mainboard/tyan/s2850/auto.c b/src/mainboard/tyan/s2850/auto.c index 195b7361c7..cdde963a3a 100644 --- a/src/mainboard/tyan/s2850/auto.c +++ b/src/mainboard/tyan/s2850/auto.c @@ -111,7 +111,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -//#include "northbridge/amd/amdk8/setup_resource_map.c" +#include "northbridge/amd/amdk8/setup_resource_map.c" #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "sdram/generic_sdram.c" @@ -144,7 +144,7 @@ static void main(unsigned long bist) init_timer(); if (cpu_init_detected()) { -#if 0 +#if 1 asm volatile ("jmp __cpu_reset"); #else /* cpu reset also reset the memtroller ???? diff --git a/src/mainboard/tyan/s2850/mainboard.c b/src/mainboard/tyan/s2850/mainboard.c index 201f73d9b9..ce2405e3cd 100644 --- a/src/mainboard/tyan/s2850/mainboard.c +++ b/src/mainboard/tyan/s2850/mainboard.c @@ -269,6 +269,5 @@ static void enable_dev(struct device *dev) dev_root.ops = &mainboard_operations; } struct chip_operations mainboard_tyan_s2850_ops = { - .name = "Tyan s2850 mainboard ", .enable_dev = enable_dev, }; diff --git a/src/mainboard/tyan/s2875/Config.lb b/src/mainboard/tyan/s2875/Config.lb index 1eabc22f57..97a06492bc 100644 --- a/src/mainboard/tyan/s2875/Config.lb +++ b/src/mainboard/tyan/s2875/Config.lb @@ -43,26 +43,27 @@ if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end #object reset.o + ## ## Romcc output ## makerule ./failover.E - depends "$(MAINBOARD)/failover.c" - action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./failover.inc - depends "./failover.E ./romcc" - action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end -makerule ./auto.E - depends "$(MAINBOARD)/auto.c option_table.h " - action "$(CPP) -I$(TOP)/src -I. $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E" +makerule ./auto.E + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end -makerule ./auto.inc - depends "./auto.E ./romcc" - action "./romcc -mcpu=k8 -O2 ./auto.E > auto.inc" +makerule ./auto.inc + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end ## @@ -167,14 +168,21 @@ chip northbridge/amd/amdk8 irq 0x70 = 1 irq 0x72 = 12 end - device pnp 2e.6 off end # CIR - device pnp 2e.7 off end # GAME_MIDI_GIPO1 - device pnp 2e.8 off end # GPIO2 - device pnp 2e.9 off end # GPIO3 - device pnp 2e.a off end # ACPI - device pnp 2e.b on # HW Monitor - io 0x60 = 0x290 - end + device pnp 2e.6 off # CIR + io 0x60 = 0x100 + end + device pnp 2e.7 off # GAME_MIDI_GIPO1 + io 0x60 = 0x201 + io 0x62 = 0x330 + irq 0x70 = 9 + end + device pnp 2e.8 off end # GPIO2 + device pnp 2e.9 off end # GPIO3 + device pnp 2e.a off end # ACPI + device pnp 2e.b on # HW Monitor + io 0x60 = 0x290 + irq 0x70 = 5 + end end end device pci 1.1 on end diff --git a/src/mainboard/tyan/s2875/Options.lb b/src/mainboard/tyan/s2875/Options.lb index a130453610..103232a5a0 100644 --- a/src/mainboard/tyan/s2875/Options.lb +++ b/src/mainboard/tyan/s2875/Options.lb @@ -32,6 +32,8 @@ uses LB_CKS_LOC uses MAINBOARD_PART_NUMBER uses MAINBOARD_VENDOR uses MAINBOARD +uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID +uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID uses LINUXBIOS_EXTRA_VERSION uses _RAMBASE uses CC @@ -43,6 +45,8 @@ uses DEFAULT_CONSOLE_LOGLEVEL uses MAXIMUM_CONSOLE_LOGLEVEL uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_SERIAL8250 +uses HAVE_INIT_TIMER +uses CONFIG_GDB_STUB ### @@ -80,7 +84,7 @@ default HARD_RESET_FUNCTION=0 ## Build code to export a programmable irq routing table ## default HAVE_PIRQ_TABLE=1 -default IRQ_SLOT_COUNT=9 +default IRQ_SLOT_COUNT=13 ## ## Build code to export an x86 MP table @@ -117,6 +121,8 @@ default CONFIG_IOAPIC=1 ## default MAINBOARD_PART_NUMBER="Tyan" default MAINBOARD_VENDOR="s2875" +default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1 +default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2875 ### ### LinuxBIOS layout values @@ -161,6 +167,11 @@ default CC="gcc" default HOSTCC="gcc" ## +## Disable the gdb stub by default +## +default CONFIG_GDB_STUB=0 + +## ## The Serial Console ## diff --git a/src/mainboard/tyan/s2875/auto.c b/src/mainboard/tyan/s2875/auto.c index 941c5900bf..12751bcde9 100644 --- a/src/mainboard/tyan/s2875/auto.c +++ b/src/mainboard/tyan/s2875/auto.c @@ -128,7 +128,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) } -//#include "northbridge/amd/amdk8/setup_resource_map.c" +#include "northbridge/amd/amdk8/setup_resource_map.c" #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "sdram/generic_sdram.c" @@ -173,7 +173,7 @@ static void main(unsigned long bist) init_timer(); if (cpu_init_detected()) { -#if 0 +#if 1 asm volatile ("jmp __cpu_reset"); #else /* cpu reset also reset the memtroller ???? diff --git a/src/mainboard/tyan/s2875/mainboard.c b/src/mainboard/tyan/s2875/mainboard.c index d2a2ebe448..341a4eb732 100644 --- a/src/mainboard/tyan/s2875/mainboard.c +++ b/src/mainboard/tyan/s2875/mainboard.c @@ -269,6 +269,5 @@ static void enable_dev(struct device *dev) dev_root.ops = &mainboard_operations; } struct chip_operations mainboard_tyan_s2875_ops = { - .name = "Tyan s2875 mainboard ", .enable_dev = enable_dev, }; diff --git a/src/mainboard/tyan/s2880/Config.lb b/src/mainboard/tyan/s2880/Config.lb index a9fd228e62..e6c4de9953 100644 --- a/src/mainboard/tyan/s2880/Config.lb +++ b/src/mainboard/tyan/s2880/Config.lb @@ -43,26 +43,27 @@ if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end #object reset.o + ## ## Romcc output ## makerule ./failover.E - depends "$(MAINBOARD)/failover.c" - action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./failover.inc - depends "./failover.E ./romcc" - action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end -makerule ./auto.E - depends "$(MAINBOARD)/auto.c option_table.h " - action "$(CPP) -I$(TOP)/src -I. $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E" +makerule ./auto.E + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end -makerule ./auto.inc - depends "./auto.E ./romcc" - action "./romcc -mcpu=k8 -O2 ./auto.E > auto.inc" +makerule ./auto.inc + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end ## @@ -169,14 +170,21 @@ chip northbridge/amd/amdk8 irq 0x70 = 1 irq 0x72 = 12 end - device pnp 2e.6 off end # CIR - device pnp 2e.7 off end # GAME_MIDI_GIPO1 - device pnp 2e.8 off end # GPIO2 - device pnp 2e.9 off end # GPIO3 - device pnp 2e.a off end # ACPI - device pnp 2e.b on # HW Monitor - io 0x60 = 0x290 - end + device pnp 2e.6 off # CIR + io 0x60 = 0x100 + end + device pnp 2e.7 off # GAME_MIDI_GIPO1 + io 0x60 = 0x201 + io 0x62 = 0x330 + irq 0x70 = 9 + end + device pnp 2e.8 off end # GPIO2 + device pnp 2e.9 off end # GPIO3 + device pnp 2e.a off end # ACPI + device pnp 2e.b on # HW Monitor + io 0x60 = 0x290 + irq 0x70 = 5 + end end end device pci 1.1 on end diff --git a/src/mainboard/tyan/s2880/Options.lb b/src/mainboard/tyan/s2880/Options.lb index 35908cab8f..dd95fe7acd 100644 --- a/src/mainboard/tyan/s2880/Options.lb +++ b/src/mainboard/tyan/s2880/Options.lb @@ -32,6 +32,8 @@ uses LB_CKS_LOC uses MAINBOARD_PART_NUMBER uses MAINBOARD_VENDOR uses MAINBOARD +uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID +uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID uses LINUXBIOS_EXTRA_VERSION uses _RAMBASE uses CC @@ -43,6 +45,8 @@ uses DEFAULT_CONSOLE_LOGLEVEL uses MAXIMUM_CONSOLE_LOGLEVEL uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_SERIAL8250 +uses HAVE_INIT_TIMER +uses CONFIG_GDB_STUB ### @@ -80,7 +84,7 @@ default HARD_RESET_FUNCTION=0 ## Build code to export a programmable irq routing table ## default HAVE_PIRQ_TABLE=1 -default IRQ_SLOT_COUNT=9 +default IRQ_SLOT_COUNT=13 ## ## Build code to export an x86 MP table @@ -116,7 +120,9 @@ default CONFIG_IOAPIC=1 ## Clean up the motherboard id strings ## default MAINBOARD_PART_NUMBER="Tyan" -default MAINBOARD_VENDOR="s2881" +default MAINBOARD_VENDOR="s2880" +default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1 +default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2880 ### ### LinuxBIOS layout values @@ -161,6 +167,11 @@ default CC="gcc" default HOSTCC="gcc" ## +## Disable the gdb stub by default +## +default CONFIG_GDB_STUB=0 + +## ## The Serial Console ## diff --git a/src/mainboard/tyan/s2880/auto.c b/src/mainboard/tyan/s2880/auto.c index 182582c22c..5bab2abbe1 100644 --- a/src/mainboard/tyan/s2880/auto.c +++ b/src/mainboard/tyan/s2880/auto.c @@ -123,7 +123,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) } -//#include "northbridge/amd/amdk8/setup_resource_map.c" +#include "northbridge/amd/amdk8/setup_resource_map.c" #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "sdram/generic_sdram.c" @@ -168,7 +168,7 @@ static void main(unsigned long bist) init_timer(); if (cpu_init_detected()) { -#if 0 +#if 1 asm volatile ("jmp __cpu_reset"); #else /* cpu reset also reset the memtroller ???? diff --git a/src/mainboard/tyan/s2880/mainboard.c b/src/mainboard/tyan/s2880/mainboard.c index 5473ce6a88..a0014f3fae 100644 --- a/src/mainboard/tyan/s2880/mainboard.c +++ b/src/mainboard/tyan/s2880/mainboard.c @@ -269,6 +269,5 @@ static void enable_dev(struct device *dev) dev_root.ops = &mainboard_operations; } struct chip_operations mainboard_tyan_s2880_ops = { - .name = "Tyan s2880 mainboard ", .enable_dev = enable_dev, }; diff --git a/src/mainboard/tyan/s2881/Config.lb b/src/mainboard/tyan/s2881/Config.lb index 3bdbfa4fe7..fa563fb497 100644 --- a/src/mainboard/tyan/s2881/Config.lb +++ b/src/mainboard/tyan/s2881/Config.lb @@ -43,26 +43,27 @@ if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end #object reset.o + ## ## Romcc output ## makerule ./failover.E - depends "$(MAINBOARD)/failover.c" - action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./failover.inc - depends "./failover.E ./romcc" - action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end -makerule ./auto.E - depends "$(MAINBOARD)/auto.c option_table.h " - action "$(CPP) -I$(TOP)/src -I. $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E" +makerule ./auto.E + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end -makerule ./auto.inc - depends "./auto.E ./romcc" - action "./romcc -mcpu=k8 -O2 ./auto.E > auto.inc" +makerule ./auto.inc + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end ## @@ -171,14 +172,21 @@ chip northbridge/amd/amdk8 irq 0x70 = 1 irq 0x72 = 12 end - device pnp 2e.6 off end # CIR - device pnp 2e.7 off end # GAME_MIDI_GIPO1 - device pnp 2e.8 off end # GPIO2 - device pnp 2e.9 off end # GPIO3 - device pnp 2e.a off end # ACPI - device pnp 2e.b on # HW Monitor - io 0x60 = 0x290 - end + device pnp 2e.6 off # CIR + io 0x60 = 0x100 + end + device pnp 2e.7 off # GAME_MIDI_GIPO1 + io 0x60 = 0x201 + io 0x62 = 0x330 + irq 0x70 = 9 + end + device pnp 2e.8 off end # GPIO2 + device pnp 2e.9 off end # GPIO3 + device pnp 2e.a off end # ACPI + device pnp 2e.b on # HW Monitor + io 0x60 = 0x290 + irq 0x70 = 5 + end end end device pci 1.1 on end diff --git a/src/mainboard/tyan/s2881/Options.lb b/src/mainboard/tyan/s2881/Options.lb index 35908cab8f..e65f53c9b1 100644 --- a/src/mainboard/tyan/s2881/Options.lb +++ b/src/mainboard/tyan/s2881/Options.lb @@ -32,6 +32,8 @@ uses LB_CKS_LOC uses MAINBOARD_PART_NUMBER uses MAINBOARD_VENDOR uses MAINBOARD +uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID +uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID uses LINUXBIOS_EXTRA_VERSION uses _RAMBASE uses CC @@ -43,6 +45,8 @@ uses DEFAULT_CONSOLE_LOGLEVEL uses MAXIMUM_CONSOLE_LOGLEVEL uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_SERIAL8250 +uses HAVE_INIT_TIMER +uses CONFIG_GDB_STUB ### @@ -117,6 +121,8 @@ default CONFIG_IOAPIC=1 ## default MAINBOARD_PART_NUMBER="Tyan" default MAINBOARD_VENDOR="s2881" +default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1 +default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2881 ### ### LinuxBIOS layout values @@ -161,6 +167,11 @@ default CC="gcc" default HOSTCC="gcc" ## +## Disable the gdb stub by default +## +default CONFIG_GDB_STUB=0 + +## ## The Serial Console ## diff --git a/src/mainboard/tyan/s2881/auto.c b/src/mainboard/tyan/s2881/auto.c index f9d352cc86..9774d86586 100644 --- a/src/mainboard/tyan/s2881/auto.c +++ b/src/mainboard/tyan/s2881/auto.c @@ -123,12 +123,13 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -//#include "northbridge/amd/amdk8/setup_resource_map.c" +#include "northbridge/amd/amdk8/setup_resource_map.c" #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "sdram/generic_sdram.c" -#include "resourcemap.c" /* tyan does not want the default */ + /* tyan does not want the default */ +#include "resourcemap.c" #define FIRST_CPU 1 #define SECOND_CPU 1 @@ -167,7 +168,7 @@ static void main(unsigned long bist) init_timer(); if (cpu_init_detected()) { -#if 0 +#if 1 asm volatile ("jmp __cpu_reset"); #else /* cpu reset also reset the memtroller ???? diff --git a/src/mainboard/tyan/s2881/mainboard.c b/src/mainboard/tyan/s2881/mainboard.c index 2709be8cf9..e058fe6a6d 100644 --- a/src/mainboard/tyan/s2881/mainboard.c +++ b/src/mainboard/tyan/s2881/mainboard.c @@ -269,6 +269,5 @@ static void enable_dev(struct device *dev) dev_root.ops = &mainboard_operations; } struct chip_operations mainboard_tyan_s2881_ops = { - .name = "Tyan s2881 mainboard ", .enable_dev = enable_dev, }; diff --git a/src/mainboard/tyan/s2882/Config.lb b/src/mainboard/tyan/s2882/Config.lb index be79fcebc8..457b3d0ef0 100644 --- a/src/mainboard/tyan/s2882/Config.lb +++ b/src/mainboard/tyan/s2882/Config.lb @@ -47,22 +47,22 @@ if HAVE_PIRQ_TABLE object irq_tables.o end ## Romcc output ## makerule ./failover.E - depends "$(MAINBOARD)/failover.c" - action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./failover.inc - depends "./failover.E ./romcc" - action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end -makerule ./auto.E - depends "$(MAINBOARD)/auto.c option_table.h " - action "$(CPP) -I$(TOP)/src -I. $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E" +makerule ./auto.E + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end -makerule ./auto.inc - depends "./auto.E ./romcc" - action "./romcc -mcpu=k8 -O2 ./auto.E > auto.inc" +makerule ./auto.inc + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end ## @@ -169,14 +169,21 @@ chip northbridge/amd/amdk8 irq 0x70 = 1 irq 0x72 = 12 end - device pnp 2e.6 off end # CIR - device pnp 2e.7 off end # GAME_MIDI_GIPO1 - device pnp 2e.8 off end # GPIO2 - device pnp 2e.9 off end # GPIO3 - device pnp 2e.a off end # ACPI - device pnp 2e.b on # HW Monitor - io 0x60 = 0x290 - end + device pnp 2e.6 off # CIR + io 0x60 = 0x100 + end + device pnp 2e.7 off # GAME_MIDI_GIPO1 + io 0x60 = 0x201 + io 0x62 = 0x330 + irq 0x70 = 9 + end + device pnp 2e.8 off end # GPIO2 + device pnp 2e.9 off end # GPIO3 + device pnp 2e.a off end # ACPI + device pnp 2e.b on # HW Monitor + io 0x60 = 0x290 + irq 0x70 = 5 + end end end device pci 1.1 on end diff --git a/src/mainboard/tyan/s2882/Options.lb b/src/mainboard/tyan/s2882/Options.lb index 0c14930a59..14c643d6f5 100644 --- a/src/mainboard/tyan/s2882/Options.lb +++ b/src/mainboard/tyan/s2882/Options.lb @@ -32,6 +32,8 @@ uses LB_CKS_LOC uses MAINBOARD_PART_NUMBER uses MAINBOARD_VENDOR uses MAINBOARD +uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID +uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID uses LINUXBIOS_EXTRA_VERSION uses _RAMBASE uses CC @@ -43,6 +45,8 @@ uses DEFAULT_CONSOLE_LOGLEVEL uses MAXIMUM_CONSOLE_LOGLEVEL uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_SERIAL8250 +uses HAVE_INIT_TIMER +uses CONFIG_GDB_STUB ### @@ -80,7 +84,7 @@ default HARD_RESET_FUNCTION=0 ## Build code to export a programmable irq routing table ## default HAVE_PIRQ_TABLE=1 -default IRQ_SLOT_COUNT=9 +default IRQ_SLOT_COUNT=15 ## ## Build code to export an x86 MP table @@ -117,6 +121,8 @@ default CONFIG_IOAPIC=1 ## default MAINBOARD_PART_NUMBER="Tyan" default MAINBOARD_VENDOR="s2882" +default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1 +default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2882 ### ### LinuxBIOS layout values @@ -161,6 +167,11 @@ default CC="gcc" default HOSTCC="gcc" ## +## Disable the gdb stub by default +## +default CONFIG_GDB_STUB=0 + +## ## The Serial Console ## @@ -198,7 +209,7 @@ default TTYS0_LCS=0x3 ## SPEW 9 Way too many details ## Request this level of debugging output -default DEFAULT_CONSOLE_LOGLEVEL=8 +default DEFAULT_CONSOLE_LOGLEVEL=7 ## At a maximum only compile in this level of debugging default MAXIMUM_CONSOLE_LOGLEVEL=8 diff --git a/src/mainboard/tyan/s2882/auto.c b/src/mainboard/tyan/s2882/auto.c index ba4ccc961d..e314459aa3 100644 --- a/src/mainboard/tyan/s2882/auto.c +++ b/src/mainboard/tyan/s2882/auto.c @@ -126,12 +126,12 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -//#include "northbridge/amd/amdk8/setup_resource_map.c" +#include "northbridge/amd/amdk8/setup_resource_map.c" +#include "northbridge/amd/amdk8/resourcemap.c" #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "sdram/generic_sdram.c" -#include "northbridge/amd/amdk8/resourcemap.c" #define FIRST_CPU 1 #define SECOND_CPU 1 @@ -176,7 +176,7 @@ static void main(unsigned long bist) init_timer(); if (cpu_init_detected()) { -#if 0 +#if 1 asm volatile ("jmp __cpu_reset"); #else /* cpu reset also reset the memtroller ???? diff --git a/src/mainboard/tyan/s2882/mainboard.c b/src/mainboard/tyan/s2882/mainboard.c index 6a9c4bc8bd..8bc1ac9b9a 100644 --- a/src/mainboard/tyan/s2882/mainboard.c +++ b/src/mainboard/tyan/s2882/mainboard.c @@ -269,6 +269,5 @@ static void enable_dev(struct device *dev) dev_root.ops = &mainboard_operations; } struct chip_operations mainboard_tyan_s2882_ops = { - .name = "Tyan s2882 mainboard ", .enable_dev = enable_dev, }; diff --git a/src/mainboard/tyan/s2885/Config.lb b/src/mainboard/tyan/s2885/Config.lb index 2bdabea244..5b8ad9c3fa 100644 --- a/src/mainboard/tyan/s2885/Config.lb +++ b/src/mainboard/tyan/s2885/Config.lb @@ -43,26 +43,27 @@ if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end #object reset.o + ## ## Romcc output ## makerule ./failover.E - depends "$(MAINBOARD)/failover.c" - action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./failover.inc - depends "./failover.E ./romcc" - action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end -makerule ./auto.E - depends "$(MAINBOARD)/auto.c option_table.h " - action "$(CPP) -I$(TOP)/src -I. $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E" +makerule ./auto.E + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end -makerule ./auto.inc - depends "./auto.E ./romcc" - action "./romcc -mcpu=k8 -O2 ./auto.E > auto.inc" +makerule ./auto.inc + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end ## @@ -199,8 +200,8 @@ chip northbridge/amd/amdk8 device pci 1.3 on end device pci 1.5 on end device pci 1.6 off end -# register "ide0_enable" = "1" -# register "ide1_enable" = "1" + register "ide0_enable" = "1" + register "ide1_enable" = "1" end end # device pci 18.0 diff --git a/src/mainboard/tyan/s2885/Options.lb b/src/mainboard/tyan/s2885/Options.lb index 97238b80e9..520fde347c 100644 --- a/src/mainboard/tyan/s2885/Options.lb +++ b/src/mainboard/tyan/s2885/Options.lb @@ -45,6 +45,8 @@ uses DEFAULT_CONSOLE_LOGLEVEL uses MAXIMUM_CONSOLE_LOGLEVEL uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_SERIAL8250 +uses HAVE_INIT_TIMER +uses CONFIG_GDB_STUB ### @@ -82,7 +84,7 @@ default HARD_RESET_FUNCTION=0 ## Build code to export a programmable irq routing table ## default HAVE_PIRQ_TABLE=1 -default IRQ_SLOT_COUNT=9 +default IRQ_SLOT_COUNT=11 ## ## Build code to export an x86 MP table @@ -165,6 +167,11 @@ default CC="gcc" default HOSTCC="gcc" ## +## Disable the gdb stub by default +## +default CONFIG_GDB_STUB=0 + +## ## The Serial Console ## diff --git a/src/mainboard/tyan/s2885/auto.c b/src/mainboard/tyan/s2885/auto.c index 5065629e0d..b5766c166a 100644 --- a/src/mainboard/tyan/s2885/auto.c +++ b/src/mainboard/tyan/s2885/auto.c @@ -56,28 +56,22 @@ static void soft2_reset(void) static void memreset_setup(void) { -#if 0 if (is_cpu_pre_c0()) { outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 16); //REVC_MEMRST_EN=0 } else { -#endif outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 16); //REVC_MEMRST_EN=1 -#if 0 } -#endif outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 17); } static void memreset(int controllers, const struct mem_controller *ctrl) { -#if 0 if (is_cpu_pre_c0()) { udelay(800); outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 17); //REVB_MEMRST_L=1 udelay(90); } -#endif } static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes) @@ -123,7 +117,7 @@ static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes) }; if(maxnodes>2) { -// print_debug("this mainboard is only designed for 2 cpus\r\n"); + print_debug("this mainboard is only designed for 2 cpus\r\n"); maxnodes=2; } @@ -150,7 +144,8 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/coherent_ht.c" #include "sdram/generic_sdram.c" -#include "resourcemap.c" /* tyan does not want the default */ +/* tyan does not want the default */ +#include "resourcemap.c" #define FIRST_CPU 1 #define SECOND_CPU 1 @@ -205,7 +200,7 @@ static void main(unsigned long bist) init_timer(); if (cpu_init_detected()) { -#if 0 +#if 1 asm volatile ("jmp __cpu_reset"); #else /* cpu reset also reset the memtroller ???? diff --git a/src/mainboard/tyan/s2885/mainboard.c b/src/mainboard/tyan/s2885/mainboard.c index 4c3c4a3a14..a51278b06a 100644 --- a/src/mainboard/tyan/s2885/mainboard.c +++ b/src/mainboard/tyan/s2885/mainboard.c @@ -269,6 +269,5 @@ static void enable_dev(struct device *dev) dev_root.ops = &mainboard_operations; } struct chip_operations mainboard_tyan_s2885_ops = { - .name = "Tyan s2885 mainboard ", .enable_dev = enable_dev, }; diff --git a/src/mainboard/tyan/s2885/mptable.c b/src/mainboard/tyan/s2885/mptable.c index 319883a160..ba7bc390ad 100644 --- a/src/mainboard/tyan/s2885/mptable.c +++ b/src/mainboard/tyan/s2885/mptable.c @@ -13,10 +13,12 @@ void *smp_write_config_table(void *v) unsigned char bus_num; unsigned char bus_isa; + unsigned char bus_8131_0; unsigned char bus_8131_1; unsigned char bus_8131_2; unsigned char bus_8111_0; unsigned char bus_8111_1; + unsigned char bus_8151_0; unsigned char bus_8151_1; @@ -42,56 +44,59 @@ void *smp_write_config_table(void *v) { device_t dev; + /* 8151 */ + bus_8151_0 = 1; + dev = dev_find_slot(1, PCI_DEVFN(0x02,0)); + if (dev) { + bus_8151_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); +// printk_debug("bus_8151_1=%d\n",bus_8151_1); + bus_8111_0 = pci_read_config8(dev, PCI_SUBORDINATE_BUS); + bus_8111_0++; + bus_8131_0 = bus_8111_0; +// printk_debug("bus_8111_0=%d\n",bus_8111_0); + } + else { + printk_debug("ERROR - could not find PCI 1:02.0, using defaults\n"); + bus_8151_1 = 2; + bus_8111_0 = bus_8131_0 = 3; + } + /* 8111 */ - dev = dev_find_slot(3, PCI_DEVFN(0x03,0)); + dev = dev_find_slot(bus_8111_0, PCI_DEVFN(0x03,0)); if (dev) { - bus_8111_0 = pci_read_config8(dev, PCI_PRIMARY_BUS); bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS); bus_isa++; - printk_debug("bus_isa=%d\n",bus_isa); +// printk_debug("bus_isa=%d\n",bus_isa); } else { - printk_debug("ERROR - could not find PCI 3:03.0, using defaults\n"); + printk_debug("ERROR - could not find PCI %02x:03.0, using defaults\n", bus_8111_0); bus_8111_1 = 6; bus_isa = 7; } /* 8131-1 */ - dev = dev_find_slot(3, PCI_DEVFN(0x01,0)); + dev = dev_find_slot(bus_8131_0, PCI_DEVFN(0x01,0)); if (dev) { bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); } else { - printk_debug("ERROR - could not find PCI 3:01.0, using defaults\n"); + printk_debug("ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8131_0); bus_8131_1 = 4; } /* 8131-2 */ - dev = dev_find_slot(3, PCI_DEVFN(0x02,0)); + dev = dev_find_slot(bus_8131_0, PCI_DEVFN(0x02,0)); if (dev) { bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); } else { - printk_debug("ERROR - could not find PCI 3:02.0, using defaults\n"); + printk_debug("ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0); bus_8131_2 = 5; } - /* 8151 */ - dev = dev_find_slot(1, PCI_DEVFN(0x02,0)); - if (dev) { - bus_8151_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); - printk_debug("bus_8151_1=%d\n",bus_8151_1); - - } - else { - printk_debug("ERROR - could not find PCI 1:02.0, using defaults\n"); - - bus_8151_1 = 2; - } - } @@ -105,18 +110,18 @@ void *smp_write_config_table(void *v) smp_write_bus(mc, bus_isa, "ISA "); /*I/O APICs: APIC ID Version State Address*/ - smp_write_ioapic(mc, 2, 0x11, 0xfec00000); + smp_write_ioapic(mc, 2, 0x11, 0xfec00000); //8111 { device_t dev; struct resource *res; - dev = dev_find_slot(3, PCI_DEVFN(0x1,1)); + dev = dev_find_slot(bus_8131_0, PCI_DEVFN(0x1,1)); if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { - smp_write_ioapic(mc, 0x03, 0x11, res->base); + smp_write_ioapic(mc, 3, 0x11, res->base); } } - dev = dev_find_slot(3, PCI_DEVFN(0x2,1)); + dev = dev_find_slot(bus_8131_0, PCI_DEVFN(0x2,1)); if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { diff --git a/src/mainboard/tyan/s4880/Config.lb b/src/mainboard/tyan/s4880/Config.lb index efaa7199db..e25b26c6e7 100644 --- a/src/mainboard/tyan/s4880/Config.lb +++ b/src/mainboard/tyan/s4880/Config.lb @@ -47,22 +47,22 @@ if HAVE_PIRQ_TABLE object irq_tables.o end ## Romcc output ## makerule ./failover.E - depends "$(MAINBOARD)/failover.c" - action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./failover.inc - depends "./failover.E ./romcc" - action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end -makerule ./auto.E - depends "$(MAINBOARD)/auto.c option_table.h" - action "$(CPP) -I$(TOP)/src -I. $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E" +makerule ./auto.E + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end -makerule ./auto.inc - depends "./auto.E ./romcc" - action "./romcc -mcpu=k8 -O2 ./auto.E > auto.inc" +makerule ./auto.inc + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end ## @@ -171,14 +171,21 @@ chip northbridge/amd/amdk8 irq 0x70 = 1 irq 0x72 = 12 end - device pnp 2e.6 off end # CIR - device pnp 2e.7 off end # GAME_MIDI_GIPO1 - device pnp 2e.8 off end # GPIO2 - device pnp 2e.9 off end # GPIO3 - device pnp 2e.a off end # ACPI - device pnp 2e.b on # HW Monitor - io 0x60 = 0x290 - end + device pnp 2e.6 off # CIR + io 0x60 = 0x100 + end + device pnp 2e.7 off # GAME_MIDI_GIPO1 + io 0x60 = 0x201 + io 0x62 = 0x330 + irq 0x70 = 9 + end + device pnp 2e.8 off end # GPIO2 + device pnp 2e.9 off end # GPIO3 + device pnp 2e.a off end # ACPI + device pnp 2e.b on # HW Monitor + io 0x60 = 0x290 + irq 0x70 = 5 + end end end device pci 1.1 on end diff --git a/src/mainboard/tyan/s4880/Options.lb b/src/mainboard/tyan/s4880/Options.lb index da285a5f6a..f13961fbde 100644 --- a/src/mainboard/tyan/s4880/Options.lb +++ b/src/mainboard/tyan/s4880/Options.lb @@ -32,6 +32,8 @@ uses LB_CKS_LOC uses MAINBOARD_PART_NUMBER uses MAINBOARD_VENDOR uses MAINBOARD +uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID +uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID uses LINUXBIOS_EXTRA_VERSION uses _RAMBASE uses CC @@ -43,6 +45,8 @@ uses DEFAULT_CONSOLE_LOGLEVEL uses MAXIMUM_CONSOLE_LOGLEVEL uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_SERIAL8250 +uses HAVE_INIT_TIMER +uses CONFIG_GDB_STUB ### @@ -80,7 +84,7 @@ default HARD_RESET_FUNCTION=0 ## Build code to export a programmable irq routing table ## default HAVE_PIRQ_TABLE=1 -default IRQ_SLOT_COUNT=9 +default IRQ_SLOT_COUNT=22 ## ## Build code to export an x86 MP table @@ -117,6 +121,8 @@ default CONFIG_IOAPIC=1 ## default MAINBOARD_PART_NUMBER="Tyan" default MAINBOARD_VENDOR="s4880" +default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1 +default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x4880 ### ### LinuxBIOS layout values @@ -161,6 +167,11 @@ default CC="gcc" default HOSTCC="gcc" ## +## Disable the gdb stub by default +## +default CONFIG_GDB_STUB=0 + +## ## The Serial Console ## diff --git a/src/mainboard/tyan/s4880/auto.c b/src/mainboard/tyan/s4880/auto.c index e695fad894..6130f9f3f7 100644 --- a/src/mainboard/tyan/s4880/auto.c +++ b/src/mainboard/tyan/s4880/auto.c @@ -147,13 +147,14 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -//#include "northbridge/amd/amdk8/setup_resource_map.c" +#include "northbridge/amd/amdk8/setup_resource_map.c" #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "sdram/generic_sdram.c" -#include "resourcemap.c" /* tyan does not want the default */ + /* tyan does not want the default */ +#include "resourcemap.c" #define FIRST_CPU 1 #define SECOND_CPU 1 @@ -235,7 +236,7 @@ static void main(unsigned long bist) init_timer(); if (cpu_init_detected()) { -#if 0 +#if 1 asm volatile ("jmp __cpu_reset"); #else /* cpu reset also reset the memtroller ???? diff --git a/src/mainboard/tyan/s4880/mainboard.c b/src/mainboard/tyan/s4880/mainboard.c index a1c1122b17..1c3e40c13a 100644 --- a/src/mainboard/tyan/s4880/mainboard.c +++ b/src/mainboard/tyan/s4880/mainboard.c @@ -269,6 +269,5 @@ static void enable_dev(struct device *dev) dev_root.ops = &mainboard_operations; } struct chip_operations mainboard_tyan_s4880_ops = { - .name = "Tyan s4880 mainboard ", .enable_dev = enable_dev, }; diff --git a/src/mainboard/tyan/s4880/mptable.c b/src/mainboard/tyan/s4880/mptable.c index 0f8ad22902..2577a8b1bc 100644 --- a/src/mainboard/tyan/s4880/mptable.c +++ b/src/mainboard/tyan/s4880/mptable.c @@ -134,8 +134,8 @@ void *smp_write_config_table(void *v) //On Board Via USB 1.1 and 2 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (3<<2)|0, 0x4, 0x11); //1.1 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (3<<2)|1, 0x4, 0x12); //1.1 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (3<<2)|2, 0x4, 0x10); //2 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (3<<2)|1, 0x4, 0x10); //1.1 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (3<<2)|2, 0x4, 0x12); //2 //Slot 5 PCI 32 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (4<<2)|0, 0x4, 0x10); diff --git a/src/mainboard/tyan/s4882/Config.lb b/src/mainboard/tyan/s4882/Config.lb index 6c3b44d7a8..198a3ac3ba 100644 --- a/src/mainboard/tyan/s4882/Config.lb +++ b/src/mainboard/tyan/s4882/Config.lb @@ -47,22 +47,22 @@ if HAVE_PIRQ_TABLE object irq_tables.o end ## Romcc output ## makerule ./failover.E - depends "$(MAINBOARD)/failover.c" - action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./failover.inc - depends "./failover.E ./romcc" - action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end -makerule ./auto.E - depends "$(MAINBOARD)/auto.c option_table.h " - action "$(CPP) -I$(TOP)/src -I. $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E" +makerule ./auto.E + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end -makerule ./auto.inc - depends "./auto.E ./romcc" - action "./romcc -mcpu=k8 -O2 ./auto.E > auto.inc" +makerule ./auto.inc + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end ## @@ -170,14 +170,21 @@ chip northbridge/amd/amdk8 irq 0x70 = 1 irq 0x72 = 12 end - device pnp 2e.6 off end # CIR - device pnp 2e.7 off end # GAME_MIDI_GIPO1 - device pnp 2e.8 off end # GPIO2 - device pnp 2e.9 off end # GPIO3 - device pnp 2e.a off end # ACPI - device pnp 2e.b on # HW Monitor - io 0x60 = 0x290 - end + device pnp 2e.6 off # CIR + io 0x60 = 0x100 + end + device pnp 2e.7 off # GAME_MIDI_GIPO1 + io 0x60 = 0x201 + io 0x62 = 0x330 + irq 0x70 = 9 + end + device pnp 2e.8 off end # GPIO2 + device pnp 2e.9 off end # GPIO3 + device pnp 2e.a off end # ACPI + device pnp 2e.b on # HW Monitor + io 0x60 = 0x290 + irq 0x70 = 5 + end end end device pci 1.1 on end diff --git a/src/mainboard/tyan/s4882/Options.lb b/src/mainboard/tyan/s4882/Options.lb index 948f71ea85..2ee7c1b25b 100644 --- a/src/mainboard/tyan/s4882/Options.lb +++ b/src/mainboard/tyan/s4882/Options.lb @@ -32,6 +32,8 @@ uses LB_CKS_LOC uses MAINBOARD_PART_NUMBER uses MAINBOARD_VENDOR uses MAINBOARD +uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID +uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID uses LINUXBIOS_EXTRA_VERSION uses _RAMBASE uses CC @@ -43,6 +45,8 @@ uses DEFAULT_CONSOLE_LOGLEVEL uses MAXIMUM_CONSOLE_LOGLEVEL uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_SERIAL8250 +uses HAVE_INIT_TIMER +uses CONFIG_GDB_STUB ### @@ -80,7 +84,7 @@ default HARD_RESET_FUNCTION=0 ## Build code to export a programmable irq routing table ## default HAVE_PIRQ_TABLE=1 -default IRQ_SLOT_COUNT=9 +default IRQ_SLOT_COUNT=22 ## ## Build code to export an x86 MP table @@ -117,6 +121,8 @@ default CONFIG_IOAPIC=1 ## default MAINBOARD_PART_NUMBER="Tyan" default MAINBOARD_VENDOR="s4882" +default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1 +default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x4882 ### ### LinuxBIOS layout values @@ -161,6 +167,11 @@ default CC="gcc" default HOSTCC="gcc" ## +## Disable the gdb stub by default +## +default CONFIG_GDB_STUB=0 + +## ## The Serial Console ## diff --git a/src/mainboard/tyan/s4882/auto.c b/src/mainboard/tyan/s4882/auto.c index 1a49ce34ba..c0947ab2f8 100644 --- a/src/mainboard/tyan/s4882/auto.c +++ b/src/mainboard/tyan/s4882/auto.c @@ -147,13 +147,14 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -//#include "northbridge/amd/amdk8/setup_resource_map.c" +#include "northbridge/amd/amdk8/setup_resource_map.c" #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "sdram/generic_sdram.c" -#include "resourcemap.c" /* tyan does not want the default */ + /* tyan does not want the default */ +#include "resourcemap.c" #define FIRST_CPU 1 #define SECOND_CPU 1 @@ -234,7 +235,7 @@ static void main(unsigned long bist) init_timer(); if (cpu_init_detected()) { -#if 0 +#if 1 asm volatile ("jmp __cpu_reset"); #else /* cpu reset also reset the memtroller ???? diff --git a/src/mainboard/tyan/s4882/mainboard.c b/src/mainboard/tyan/s4882/mainboard.c index 3727ff55f3..59723ac4e3 100644 --- a/src/mainboard/tyan/s4882/mainboard.c +++ b/src/mainboard/tyan/s4882/mainboard.c @@ -269,6 +269,5 @@ static void enable_dev(struct device *dev) dev_root.ops = &mainboard_operations; } struct chip_operations mainboard_tyan_s4882_ops = { - .name = "Tyan s4882 mainboard ", .enable_dev = enable_dev, }; diff --git a/src/mainboard/tyan/s4882/mptable.c b/src/mainboard/tyan/s4882/mptable.c index 98e238232a..98dd0cbf64 100644 --- a/src/mainboard/tyan/s4882/mptable.c +++ b/src/mainboard/tyan/s4882/mptable.c @@ -134,8 +134,8 @@ void *smp_write_config_table(void *v) //On Board Via USB 1.1 and 2 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (3<<2)|0, 0x4, 0x11); //1.1 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (3<<2)|1, 0x4, 0x12); //1.1 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (3<<2)|2, 0x4, 0x10); //2 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (3<<2)|1, 0x4, 0x10); //1.1 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (3<<2)|2, 0x4, 0x12); //2 //Slot 5 PCI 32 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (4<<2)|0, 0x4, 0x10); |