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authorJason Glenesk <jason.glenesk@amd.corp-partner.google.com>2021-04-26 16:34:04 -0700
committerFelix Held <felix-coreboot@felixheld.de>2021-04-28 09:54:57 +0000
commit925e3896d000e59698926ba8a043b699eaf0e87c (patch)
treec2fcdfeba5b9b6c1003522d0c59565f7168b7fb2 /src
parent7a0b9b680b9459ac64e90c942f76fe765063e585 (diff)
mb/amd/majolica:Set IRQ for GPIO controller
AMD GPIO driver will not load if IRQ is not set. As a consequence, it does not clear the interrupt when waking from S0i3. BUG=178728116 TEST=Perform 2 S0i3 cycles, confirming second cycle does not return instantly due to first interrupt not being cleared. Change-Id: I3072263e8e68f939a47ed4125444c60133087824 Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52682 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/amd/majolica/mainboard.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/amd/majolica/mainboard.c b/src/mainboard/amd/majolica/mainboard.c
index 1a7be4be29..2dd2d57241 100644
--- a/src/mainboard/amd/majolica/mainboard.c
+++ b/src/mainboard/amd/majolica/mainboard.c
@@ -52,7 +52,7 @@ static const struct fch_irq_routing {
{ PIRQ_SDIO, PIRQ_NC, PIRQ_NC },
{ PIRQ_SATA, PIRQ_NC, PIRQ_NC },
{ PIRQ_EMMC, PIRQ_NC, PIRQ_NC },
- { PIRQ_GPIO, PIRQ_NC, PIRQ_NC },
+ { PIRQ_GPIO, 7, 7 },
{ PIRQ_I2C2, PIRQ_NC, PIRQ_NC },
{ PIRQ_I2C3, PIRQ_NC, PIRQ_NC },
{ PIRQ_UART0, 4, 4 },