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authorShuo Liu <shuo.liu@intel.com>2024-04-12 02:24:18 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2024-09-24 11:13:11 +0000
commit909da87a09bec9e5b6d2f4ca5d8964a93e7056b0 (patch)
tree0360472733d7d648671f924bcf88340009a59c7b /src
parent5d03b1d216558e4d2945b0fad290efb4ba3ac8b0 (diff)
soc/intel/common/block/lpc: Support IBL eSPI
IBL eSPI should be correctly configured by LPC driver so that console input is usable. Change-Id: I77cc6dd67b36035974e7f268d32b8473e8d83483 Signed-off-by: Shuo Liu <shuo.liu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84309 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src')
-rw-r--r--src/include/device/pci_ids.h1
-rw-r--r--src/soc/intel/common/block/lpc/lpc.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 530805206f..bed671cb47 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3120,6 +3120,7 @@
#define PCI_DID_INTEL_ADP_M_N_ESPI_30 0x549e
#define PCI_DID_INTEL_ADP_M_N_ESPI_31 0x549f
#define PCI_DID_INTEL_SPR_ESPI_1 0x1b80
+#define PCI_DID_INTEL_IBL_ESPI_0 0x5795
#define PCI_DID_INTEL_MTL_ESPI_0 0x7e00
#define PCI_DID_INTEL_MTL_ESPI_1 0x7e01
#define PCI_DID_INTEL_MTL_ESPI_2 0x7e02
diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c
index ef14914968..b05ee590d4 100644
--- a/src/soc/intel/common/block/lpc/lpc.c
+++ b/src/soc/intel/common/block/lpc/lpc.c
@@ -448,6 +448,7 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_ADP_M_N_ESPI_31,
PCI_DID_INTEL_SPR_ESPI_1,
PCI_DID_INTEL_SNR_LPC,
+ PCI_DID_INTEL_IBL_ESPI_0,
0
};