diff options
| author | Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com> | 2024-03-07 15:23:59 +0900 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2024-03-09 23:38:03 +0000 |
| commit | 8e1e1acce7c590d5d7bc0bef09a76198e6dfeca2 (patch) | |
| tree | 86dcdd72496083d25d134dd542eb1a0ccd1244bd /src | |
| parent | db339b5492ed17d1031eed6701709e7ed176d9a9 (diff) | |
mb/google/brya/var/xol: Disable unused controllers
Disable unused controllers in overridetree.cb by referring to xol proto2
schematics. Enabling unused controllers blocks entering s0ix.
- I2C3
- SATA
- PCIE RP8
- PCIE RP9
- GSPI1
BUG=b:328318578
BRANCH=firmware-brya-14505.B
TEST=FW_NAME=xol emerge-brya coreboot chromeos-bootimage
Change-Id: I1be7caf8234c32406aa2cff8fc7fe9fa39b16d89
Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81105
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/brya/variants/xol/overridetree.cb | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/xol/overridetree.cb b/src/mainboard/google/brya/variants/xol/overridetree.cb index 165311d10c..b825ddd2f5 100644 --- a/src/mainboard/google/brya/variants/xol/overridetree.cb +++ b/src/mainboard/google/brya/variants/xol/overridetree.cb @@ -325,6 +325,7 @@ chip soc/intel/alderlake device i2c 50 on end end end #I2C1 + device ref i2c3 off end device ref i2c5 on chip drivers/i2c/hid register "generic.hid" = ""ZNT0000"" @@ -358,6 +359,10 @@ chip soc/intel/alderlake device pnp 0c09.0 on end end end + device ref sata off end + device ref pcie_rp8 off end + device ref pcie_rp9 off end + device ref gspi1 off end device ref pmc hidden chip drivers/intel/pmc_mux device generic 0 on |