timestamp: Remove HAS_PRECBMEM_TIMESTAMP_REGION Kconfig

This patch generalizes the approach previously used for ARM32
TTB_SUBTABLES to "auto-detect" whether a certain region was defined in
memlayout.ld. This allows us to get rid of the explicit Kconfig for the
TIMESTAMP region, reducing configuration redundancy and avoiding
confusion when setting up future boards.

(Removing armv4/bootblock_simple.c because it references this Kconfig
and it is a dead file that I just forgot to remove in CL:12076.)

BRANCH=None
BUG=None
TEST=Booted Oak and confirmed that all pre-RAM timestamps are still
there. Built Nyan and Falco.

Change-Id: I557a4b263018511d17baa4177963130a97ea310a
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/13652
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

15 files changed, 40 insertions, 85 deletions

diff --git a/src/Kconfig b/src/Kconfig
index fa60957a1f..760fdf7d6a 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -198,14 +198,6 @@ config COLLECT_TIMESTAMPS
 	  Make coreboot create a table of timer-ID/timer-value pairs to
 	  allow measuring time spent at different phases of the boot process.
 
-config HAS_PRECBMEM_TIMESTAMP_REGION
-	bool "Timestamp region exists for pre-cbmem timestamps"
-	default y if ARCH_ROMSTAGE_X86_32 && CACHE_AS_RAM
-	help
-	  A separate region is maintained to allow storing of timestamps before
-	  cbmem comes up. This is useful for storing timestamps across different
-	  stage boundaries.
-
 config USE_BLOBS
 	bool "Allow use of binary-only repository"
 	default n
diff --git a/src/arch/arm/armv4/bootblock_simple.c b/src/arch/arm/armv4/bootblock_simple.c
deleted file mode 100644
index 85f486e796..0000000000
--- a/src/arch/arm/armv4/bootblock_simple.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2010 Google Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/exception.h>
-#include <arch/stages.h>
-#include <bootblock_common.h>
-#include <cbfs.h>
-#include <console/console.h>
-#include <delay.h>
-#include <program_loading.h>
-#include <timestamp.h>
-
-__attribute__((weak)) void bootblock_mainboard_early_init(void) { /* no-op */ }
-__attribute__((weak)) void bootblock_soc_init(void) { /* do nothing */ }
-__attribute__((weak)) void bootblock_mainboard_init(void) { /* do nothing */ }
-
-void main(void)
-{
-	init_timer();
-	if (IS_ENABLED(CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION))
-		timestamp_init(timestamp_get());
-
-	bootblock_mainboard_early_init();
-
-	if (CONFIG_BOOTBLOCK_CONSOLE) {
-		console_init();
-		exception_init();
-	}
-
-	bootblock_soc_init();
-	bootblock_mainboard_init();
-
-	run_romstage();
-}
diff --git a/src/arch/arm/armv7/mmu.c b/src/arch/arm/armv7/mmu.c
index 8c2f78c4d0..2cf90e75f7 100644
--- a/src/arch/arm/armv7/mmu.c
+++ b/src/arch/arm/armv7/mmu.c
@@ -118,11 +118,8 @@ typedef uint32_t pte_t;
 
 static pte_t *const ttb_buff = (void *)_ttb;
 
-/* Not all boards want to use subtables and declare them in memlayout.ld. This
- * outputs two 0x00000000 symbols if they don't, making _ttb_subtables_size 0.
- * (I would like to explicitly assign them to 0 here, but that triggers
- * https://sourceware.org/bugzilla/show_bug.cgi?id=1038 in GNU as.) */
-asm (".weak _ttb_subtables, _ettb_subtables");
+/* Not all boards want to use subtables and declare them in memlayout.ld. */
+DECLARE_OPTIONAL_REGION(ttb_subtables);
 
 static struct {
 	pte_t value;
diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld
index f29a465784..d19e61300b 100644
--- a/src/arch/x86/car.ld
+++ b/src/arch/x86/car.ld
@@ -42,9 +42,7 @@
 	 * backing store once cbmem comes online. Therefore, this data needs
 	 * to reside in the migrated area (between _car_data_start and
 	 * _car_data_end). */
-#if IS_ENABLED(CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION)
 	TIMESTAMP(., 0x100)
-#endif
 	/* _car_global_start and _car_global_end provide symbols to per-stage
 	 * variables that are not shared like the timestamp and the pre-ram
 	 * cbmem console. This is useful for clearing this area on a per-stage
diff --git a/src/include/symbols.h b/src/include/symbols.h
index 4276176398..a36392f125 100644
--- a/src/include/symbols.h
+++ b/src/include/symbols.h
@@ -84,4 +84,11 @@ extern u8 _framebuffer[];
 extern u8 _eframebuffer[];
 #define _framebuffer_size (_eframebuffer - _framebuffer)
 
+/* Put this into a .c file accessing a linker script region to mark that region
+ * as "optional". If it is defined in memlayout.ld (or anywhere else), the
+ * values from that definition will be used. If not, start, end and size will
+ * all evaluate to 0. (We can't explicitly assign the symbols to 0 in the
+ * assembly due to https://sourceware.org/bugzilla/show_bug.cgi?id=1038.) */
+#define DECLARE_OPTIONAL_REGION(name) asm (".weak _" #name ", _e" #name )
+
 #endif /* __SYMBOLS_H */
diff --git a/src/lib/bootblock.c b/src/lib/bootblock.c
index d7d0bb56f4..4a36a58f85 100644
--- a/src/lib/bootblock.c
+++ b/src/lib/bootblock.c
@@ -19,8 +19,11 @@
 #include <console/console.h>
 #include <delay.h>
 #include <program_loading.h>
+#include <symbols.h>
 #include <timestamp.h>
 
+DECLARE_OPTIONAL_REGION(timestamp);
+
 __attribute__((weak)) void bootblock_mainboard_early_init(void) { /* no-op */ }
 __attribute__((weak)) void bootblock_soc_init(void) { /* do nothing */ }
 __attribute__((weak)) void bootblock_mainboard_init(void) { /* do nothing */ }
@@ -28,7 +31,9 @@ __attribute__((weak)) void bootblock_mainboard_init(void) { /* do nothing */ }
 void main(void)
 {
 	init_timer();
-	if (IS_ENABLED(CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION))
+
+	/* Initialize timestamps if we have TIMESTAMP region in memlayout.ld. */
+	if (IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS) && _timestamp_size > 0)
 		timestamp_init(timestamp_get());
 
 	bootblock_mainboard_early_init();
diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c
index 2850fb7509..ae84c4f673 100644
--- a/src/lib/timestamp.c
+++ b/src/lib/timestamp.c
@@ -38,8 +38,10 @@ struct __attribute__((__packed__)) timestamp_cache {
 	struct timestamp_entry entries[MAX_BSS_TIMESTAMP_CACHE];
 };
 
-#if (IS_ENABLED(CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION) && defined(__PRE_RAM__))
-#define USE_TIMESTAMP_REGION 1
+DECLARE_OPTIONAL_REGION(timestamp);
+
+#if defined(__PRE_RAM__)
+#define USE_TIMESTAMP_REGION (_timestamp_size > 0)
 #else
 #define USE_TIMESTAMP_REGION 0
 #endif
@@ -254,21 +256,30 @@ static void timestamp_sync_cache_to_cbmem(int is_recovery)
 
 	/*
 	 * There's no need to worry about the base_time fields being out of
-	 * sync because the following configurations are used/supported:
+	 * sync because only the following configurations are used/supported:
+	 *
+	 * 1. Timestamps get initialized before ramstage, which implies
+	 *    CONFIG_EARLY_CBMEM_INIT and CBMEM initialization in romstage.
+	 *    This requires the board to define a TIMESTAMP() region in its
+	 *    memlayout.ld (default on x86). The base_time from timestamp_init()
+	 *    (usually called from bootblock.c on most non-x86 boards) persists
+	 *    in that region until it gets synced to CBMEM in romstage.
+	 *    In ramstage, the BSS cache's base_time will be 0 until the second
+	 *    sync, which will adjust the timestamps in there to the correct
+	 *    base_time (from CBMEM) with the timestamp_add_table_entry() below.
 	 *
-	 * 1. CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION is enabled. This
-	 *    implies CONFIG_EARLY_CBMEM_INIT so once cbmem comes
-	 *    online we sync the timestamps to the cbmem storage while
-	 *    running in romstage. In ramstage the cbmem area is
-	 *    recovered and utilized.
+	 * 2. Timestamps only get initialized in ramstage *and*
+	 *    CONFIG_LATE_CBMEM_INIT is set. main() will call timestamp_init()
+	 *    very early (before any timestamps get logged) to set a base_time
+	 *    in the BSS cache, which will later get synced over to CBMEM.
 	 *
-	 * 2. CONFIG_LATE_CBMEM_INIT (!CONFIG_EARLY_CBMEM_INIT) is
-	 *    being used. That means the only cache that exists is
-	 *    in ramstage. Once cbmem comes online in ramstage those
-	 *    values are sync'd over.
+	 * If you try to initialize timestamps before ramstage but don't define
+	 * a TIMESTAMP region, all operations will fail (safely), and coreboot
+	 * will behave as if timestamps only get initialized in ramstage.
 	 *
-	 * Any other combinations will result in inconsistent base_time
-	 * values including bizarre timestamp values.
+	 * If CONFIG_EARLY_CBMEM_INIT is set but timestamps only get
+	 * initialized in ramstage, the base_time from timestamp_init() will
+	 * get ignored and all timestamps will be 0-based.
 	 */
 	for (i = 0; i < ts_cache_table->num_entries; i++) {
 		struct timestamp_entry *tse = &ts_cache_table->entries[i];
diff --git a/src/soc/broadcom/cygnus/Kconfig b/src/soc/broadcom/cygnus/Kconfig
index 8cafc4bc64..d4c34c9243 100644
--- a/src/soc/broadcom/cygnus/Kconfig
+++ b/src/soc/broadcom/cygnus/Kconfig
@@ -24,7 +24,6 @@ config SOC_BROADCOM_CYGNUS
 	select GENERIC_UDELAY
 	select HAVE_MONOTONIC_TIMER
 	select HAVE_UART_SPECIAL
-	select HAS_PRECBMEM_TIMESTAMP_REGION
 	select GENERIC_GPIO_LIB
 
 if SOC_BROADCOM_CYGNUS
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index a64505ec47..053aa2944d 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -17,7 +17,6 @@ config CPU_SPECIFIC_OPTIONS
 	select COLLECT_TIMESTAMPS
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
-	select HAS_PRECBMEM_TIMESTAMP_REGION
 	select HAVE_MONOTONIC_TIMER
 	select HAVE_SMI_HANDLER
 	select HAVE_HARD_RESET
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index c0ce9ad022..302b5752a3 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -18,7 +18,6 @@ config CPU_SPECIFIC_OPTIONS
 	select COLLECT_TIMESTAMPS
 	select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
 	select GENERIC_GPIO_LIB
-	select HAS_PRECBMEM_TIMESTAMP_REGION
 	select HAVE_HARD_RESET
 	select HAVE_INTEL_FIRMWARE
 	select HAVE_MONOTONIC_TIMER
diff --git a/src/soc/mediatek/mt8173/Kconfig b/src/soc/mediatek/mt8173/Kconfig
index d8f1116261..ed1c4daa85 100644
--- a/src/soc/mediatek/mt8173/Kconfig
+++ b/src/soc/mediatek/mt8173/Kconfig
@@ -11,7 +11,6 @@ config SOC_MEDIATEK_MT8173
 	select SPI_ATOMIC_SEQUENCING if SPI_FLASH
 	select HAVE_MONOTONIC_TIMER
 	select GENERIC_UDELAY
-	select HAS_PRECBMEM_TIMESTAMP_REGION
 	select GENERIC_GPIO_LIB
 	select HAVE_HARD_RESET
 
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig
index 04d57835d0..502e7c4c72 100644
--- a/src/soc/nvidia/tegra132/Kconfig
+++ b/src/soc/nvidia/tegra132/Kconfig
@@ -13,7 +13,6 @@ config SOC_NVIDIA_TEGRA132
 	select HAVE_HARD_RESET
 	select HAVE_UART_SPECIAL
 	select GENERIC_GPIO_LIB
-	select HAS_PRECBMEM_TIMESTAMP_REGION
 
 if SOC_NVIDIA_TEGRA132
 
diff --git a/src/soc/nvidia/tegra210/Kconfig b/src/soc/nvidia/tegra210/Kconfig
index 5273d81782..2601c70201 100644
--- a/src/soc/nvidia/tegra210/Kconfig
+++ b/src/soc/nvidia/tegra210/Kconfig
@@ -13,7 +13,6 @@ config SOC_NVIDIA_TEGRA210
 	select HAVE_HARD_RESET
 	select HAVE_UART_SPECIAL
 	select ARM64_USE_ARM_TRUSTED_FIRMWARE
-	select HAS_PRECBMEM_TIMESTAMP_REGION
 	select GENERIC_GPIO_LIB
 
 if SOC_NVIDIA_TEGRA210
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig
index dd60d630c2..aeb59ffce5 100644
--- a/src/soc/qualcomm/ipq806x/Kconfig
+++ b/src/soc/qualcomm/ipq806x/Kconfig
@@ -6,7 +6,6 @@ config SOC_QC_IPQ806X
 	select ARCH_ROMSTAGE_ARMV7
 	select ARCH_RAMSTAGE_ARMV7
 	select BOOTBLOCK_CONSOLE
-	select HAS_PRECBMEM_TIMESTAMP_REGION
 	select HAVE_UART_SPECIAL
 	select SPI_ATOMIC_SEQUENCING
 	select GENERIC_GPIO_LIB
diff --git a/src/soc/rockchip/rk3288/Kconfig b/src/soc/rockchip/rk3288/Kconfig
index 65e6dc32f8..0f39f75be2 100644
--- a/src/soc/rockchip/rk3288/Kconfig
+++ b/src/soc/rockchip/rk3288/Kconfig
@@ -20,7 +20,6 @@ config SOC_ROCKCHIP_RK3288
 	select ARCH_VERSTAGE_ARMV7
 	select ARCH_ROMSTAGE_ARMV7
 	select ARCH_RAMSTAGE_ARMV7
-	select HAS_PRECBMEM_TIMESTAMP_REGION
 	select HAVE_MONOTONIC_TIMER
 	select GENERIC_UDELAY
 	select HAVE_UART_SPECIAL