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authorJonathan Zhang <jonzhang@fb.com>2022-03-21 21:54:55 -0700
committerMartin L Roth <gaumless@gmail.com>2022-12-22 19:06:49 +0000
commit8ab5e15aca785111979c06beae0a1d3d6ce21b50 (patch)
treec7c39e596039731c28b00688cf74630ee2100a04 /src
parent13c44457f1392d3074b126d9c29a722ea130db8c (diff)
inc/dev/pci_def.h: add definitions for RCEC EA Ext. Capbility
Root Complex Event Collector Endpoint Association Extended Capability is defined in section 7.9.10 of PCIe 5.0 spec. Add its Extended Capability ID, association bitmap for RCiEPs register, and RCEC associated bus numbers register. Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Change-Id: I7bede8ed88304a2925e6e1e4128bcdd625ee0e53 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69093 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/include/device/pci_def.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h
index 59d99051e5..ef23b94e65 100644
--- a/src/include/device/pci_def.h
+++ b/src/include/device/pci_def.h
@@ -471,6 +471,7 @@
#define PCIE_EXT_CAP_L1SS_ID 0x001E
#define PCIE_EXT_CAP_LTR_ID 0x0018
#define PCIE_EXT_CAP_RESIZABLE_BAR 0x0015
+#define PCIE_EXT_CAP_RCECEA_ID 0x0007
/* Secondary PCI Express Extended Capability Structure */
#define PCI_EXP_SEC_CAP_ID 0x19
@@ -568,6 +569,10 @@
#define PCI_REBAR_CTRL_SIZE_MASK 0xffff0000
#define PCI_REBAR_CTRL_SIZE_SHIFT 16
+/* Root Complex Event Collector Endpoint Association */
+#define PCI_RCECEA_BITMAP 4
+#define PCI_RCECEA_BUSNUM 8
+
/*
* The PCI interface treats multi-function devices as independent
* devices. The slot/function address of each device is encoded