diff options
| author | Puthikorn Voravootivat <puthik@chromium.org> | 2019-02-26 15:46:42 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-02-28 17:05:18 +0000 |
| commit | 8997f67cf0e28e655cae084bc98dc91973e04657 (patch) | |
| tree | 79c832d2ceea5d607f0fe32a96a992bfe29d910c /src | |
| parent | 255f35c2d222e4d7f45aada664284df4b7ed45e3 (diff) | |
mb/google/poppy/variants/atlas: Add tdp_pl1_override value
Use 7w PL1 with DPTF throttle to enable better performance for atlas.
BUG=b:113101335
BRANCH=None
TEST=Recommend setting from thermal team. Build coreboot on atlas
Change-Id: Idcf44f213259634a507a013b31b410ed322e9479
Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org>
Reviewed-on: https://review.coreboot.org/c/31627
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Caveh Jalali <caveh@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/poppy/variants/atlas/devicetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index 5b49884801..380c747739 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -62,6 +62,7 @@ chip soc/intel/skylake register "PmTimerDisabled" = "1" register "speed_shift_enable" = "1" + register "tdp_pl1_override" = "7" register "tdp_pl2_override" = "15" register "psys_pmax" = "45" register "tcc_offset" = "10" |