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authorElyes Haouas <ehaouas@noos.fr>2022-10-14 10:01:05 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-11-12 18:00:16 +0000
commit898176a24c5bdde896a47bf60966d1476b4f913f (patch)
tree6a1d3e53b0e395bb1e2e05d632d829beb78acca4 /src
parent7d67a19cfa42a5ef3ab9734ba9e445be59fc76e3 (diff)
treewide: Replace ALIGN(x, a) by ALIGN_UP(x, a) for clarity
Change-Id: I2a255cdcbcd38406f008a26fc0ed68d532e7a721 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68267 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/morgana/agesa_acpi.c3
-rw-r--r--src/vendorcode/google/chromeos/vpd_calibration.c2
2 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/amd/morgana/agesa_acpi.c b/src/soc/amd/morgana/agesa_acpi.c
index 78c0e4cdf3..8838d9dc49 100644
--- a/src/soc/amd/morgana/agesa_acpi.c
+++ b/src/soc/amd/morgana/agesa_acpi.c
@@ -4,6 +4,7 @@
#include <acpi/acpi.h>
#include <amdblocks/acpi.h>
+#include <commonlib/bsd/helpers.h>
#include <device/device.h>
#include <FspGuids.h>
#include <soc/acpi.h>
@@ -18,7 +19,7 @@ uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current
current = add_agesa_fsp_acpi_table(AMD_FSP_ACPI_ALIB_HOB_GUID, "ALIB", rsdp, current);
/* IVRS */
- current = ALIGN(current, 8);
+ current = ALIGN_UP(current, 8);
ivrs = (acpi_ivrs_t *)current;
acpi_create_ivrs(ivrs, acpi_fill_ivrs);
current += ivrs->header.length;
diff --git a/src/vendorcode/google/chromeos/vpd_calibration.c b/src/vendorcode/google/chromeos/vpd_calibration.c
index 460d7dca3a..e5f5b579d1 100644
--- a/src/vendorcode/google/chromeos/vpd_calibration.c
+++ b/src/vendorcode/google/chromeos/vpd_calibration.c
@@ -126,7 +126,7 @@ static size_t fill_up_entries_cache(struct vpd_blob_cache_t *cache,
cache->key_size = key_length;
cache->value_size = decoded_size;
cache->blob_size =
- ALIGN(sizeof(struct calibration_blob) +
+ ALIGN_UP(sizeof(struct calibration_blob) +
cache->key_size +
cache->value_size, 4);
cbmem_entry_size += cache->blob_size;