diff options
| author | Raul E Rangel <rrangel@chromium.org> | 2021-07-02 17:08:41 -0600 |
|---|---|---|
| committer | Raul Rangel <rrangel@chromium.org> | 2021-07-14 17:55:22 +0000 |
| commit | 8916a8d802b259ab5d283d73f476de45a477c539 (patch) | |
| tree | a6c5b4d3b426da69a9be7f04d49263d7df584e45 /src | |
| parent | 73e0f18b35f154dc54994474448df283f51d659d (diff) | |
soc/amd/common/block/lpc: Don't disable the HOG bit
According to the AMD FCH architects, we should be using the default
value for the NO_HOG bit. This fixes a problem where the SPI DMA no
longer functions after the LPC init runs.
BUG=b:179699789, b:192373221
TEST=Boot guybrush and see SPI DMA working
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: If015869657f36d3533f4ab9ebd1f54b0d4eb283a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56233
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/common/block/lpc/lpc.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/soc/amd/common/block/lpc/lpc.c b/src/soc/amd/common/block/lpc/lpc.c index 2586ba95c5..3027aae125 100644 --- a/src/soc/amd/common/block/lpc/lpc.c +++ b/src/soc/amd/common/block/lpc/lpc.c @@ -61,12 +61,6 @@ static void lpc_init(struct device *dev) /* BIT 1 is not defined in public datasheet. */ byte &= ~(1 << 1); - /* - * Keep the old way. i.e., when bus master/DMA cycle is going - * on on LPC, it holds PCI grant, so no LPC slave cycle can - * interrupt and visit LPC. - */ - byte &= ~LPC_NOHOG; pci_write_config8(dev, LPC_MISC_CONTROL_BITS, byte); /* |