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authorJianjun Wang <jianjun.wang@mediatek.com>2022-03-02 10:20:26 +0800
committerHung-Te Lin <hungte@chromium.org>2022-03-08 08:25:36 +0000
commit8565b94a5396f8112a9b86c1c7529217dd603c17 (patch)
tree27e54396d7816d924b95660401a11c0424752eb7 /src
parent0e834a94556854751a321d28acf20605c75aa4da (diff)
device/mmio.h: Move readXp/writeXp helpers to device/mmio.h
These helpers are not architecture dependent and it might be used for different platform. Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Change-Id: Ic13a94d91affb7cf65a2f22f08ea39ed671bc8e8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62561 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/acpi/acpi.c14
-rw-r--r--src/arch/arm/include/armv4/arch/mmio.h6
-rw-r--r--src/arch/arm/include/armv7/arch/mmio.h6
-rw-r--r--src/arch/x86/include/arch/mmio.h40
-rw-r--r--src/include/device/mmio.h40
-rw-r--r--src/security/intel/cbnt/logging.c2
-rw-r--r--src/soc/intel/common/block/smm/smihandler.c4
7 files changed, 62 insertions, 50 deletions
diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c
index f7545b2e37..e03c7f4913 100644
--- a/src/acpi/acpi.c
+++ b/src/acpi/acpi.c
@@ -13,22 +13,22 @@
* in coreboot.
*/
-#include <console/console.h>
-#include <string.h>
#include <acpi/acpi.h>
#include <acpi/acpi_ivrs.h>
#include <acpi/acpigen.h>
#include <arch/hpet.h>
-#include <arch/mmio.h>
-#include <device/pci.h>
+#include <cbfs.h>
#include <cbmem.h>
#include <commonlib/helpers.h>
+#include <commonlib/sort.h>
+#include <console/console.h>
#include <cpu/cpu.h>
-#include <cbfs.h>
+#include <device/mmio.h>
+#include <device/pci.h>
+#include <pc80/mc146818rtc.h>
+#include <string.h>
#include <types.h>
#include <version.h>
-#include <commonlib/sort.h>
-#include <pc80/mc146818rtc.h>
static acpi_rsdp_t *valid_rsdp(acpi_rsdp_t *rsdp);
diff --git a/src/arch/arm/include/armv4/arch/mmio.h b/src/arch/arm/include/armv4/arch/mmio.h
index d7d9a9979f..0ea41d21f9 100644
--- a/src/arch/arm/include/armv4/arch/mmio.h
+++ b/src/arch/arm/include/armv4/arch/mmio.h
@@ -24,6 +24,9 @@ static inline uint32_t read32(const void *addr)
return *(volatile uint32_t *)addr;
}
+/* Not supported */
+uint64_t read64(const void *addr);
+
static inline void write8(void *addr, uint8_t val)
{
*(volatile uint8_t *)addr = val;
@@ -39,4 +42,7 @@ static inline void write32(void *addr, uint32_t val)
*(volatile uint32_t *)addr = val;
}
+/* Not supported */
+void write64(void *addr, uint64_t val);
+
#endif /* __ARCH_MMIO_H__ */
diff --git a/src/arch/arm/include/armv7/arch/mmio.h b/src/arch/arm/include/armv7/arch/mmio.h
index 45868b573a..affa0977c8 100644
--- a/src/arch/arm/include/armv7/arch/mmio.h
+++ b/src/arch/arm/include/armv7/arch/mmio.h
@@ -29,6 +29,9 @@ static inline uint32_t read32(const void *addr)
return *(volatile uint32_t *)__builtin_assume_aligned(addr, sizeof(uint32_t));
}
+/* Not supported */
+uint64_t read64(const void *addr);
+
static inline void write8(void *addr, uint8_t val)
{
dmb();
@@ -50,4 +53,7 @@ static inline void write32(void *addr, uint32_t val)
dmb();
}
+/* Not supported */
+void write64(void *addr, uint64_t val);
+
#endif /* __ARCH_MMIO_H__ */
diff --git a/src/arch/x86/include/arch/mmio.h b/src/arch/x86/include/arch/mmio.h
index 7188eac22a..c2aa0fb910 100644
--- a/src/arch/x86/include/arch/mmio.h
+++ b/src/arch/x86/include/arch/mmio.h
@@ -45,44 +45,4 @@ static __always_inline void write64(volatile void *addr, uint64_t value)
*((volatile uint64_t *)(addr)) = value;
}
-static __always_inline uint8_t read8p(const uintptr_t addr)
-{
- return read8((void *)addr);
-}
-
-static __always_inline uint16_t read16p(const uintptr_t addr)
-{
- return read16((void *)addr);
-}
-
-static __always_inline uint32_t read32p(const uintptr_t addr)
-{
- return read32((void *)addr);
-}
-
-static __always_inline uint64_t read64p(const uintptr_t addr)
-{
- return read64((void *)addr);
-}
-
-static __always_inline void write8p(const uintptr_t addr, const uint8_t value)
-{
- write8((void *)addr, value);
-}
-
-static __always_inline void write16p(const uintptr_t addr, const uint16_t value)
-{
- write16((void *)addr, value);
-}
-
-static __always_inline void write32p(const uintptr_t addr, const uint32_t value)
-{
- write32((void *)addr, value);
-}
-
-static __always_inline void write64p(const uintptr_t addr, const uint64_t value)
-{
- write64((void *)addr, value);
-}
-
#endif /* __ARCH_MMIO_H__ */
diff --git a/src/include/device/mmio.h b/src/include/device/mmio.h
index 3c9a83363f..7c8e2bd2fa 100644
--- a/src/include/device/mmio.h
+++ b/src/include/device/mmio.h
@@ -207,4 +207,44 @@ static inline void buffer_to_fifo32(const void *buffer, size_t size, void *fifo,
#define READ32_BITFIELD(addr, name) \
EXTRACT_BITFIELD(read32(addr), name)
+static __always_inline uint8_t read8p(const uintptr_t addr)
+{
+ return read8((void *)addr);
+}
+
+static __always_inline uint16_t read16p(const uintptr_t addr)
+{
+ return read16((void *)addr);
+}
+
+static __always_inline uint32_t read32p(const uintptr_t addr)
+{
+ return read32((void *)addr);
+}
+
+static __always_inline uint64_t read64p(const uintptr_t addr)
+{
+ return read64((void *)addr);
+}
+
+static __always_inline void write8p(const uintptr_t addr, const uint8_t value)
+{
+ write8((void *)addr, value);
+}
+
+static __always_inline void write16p(const uintptr_t addr, const uint16_t value)
+{
+ write16((void *)addr, value);
+}
+
+static __always_inline void write32p(const uintptr_t addr, const uint32_t value)
+{
+ write32((void *)addr, value);
+}
+
+static __always_inline void write64p(const uintptr_t addr, const uint64_t value)
+{
+ write64((void *)addr, value);
+}
+
#endif /* __DEVICE_MMIO_H__ */
diff --git a/src/security/intel/cbnt/logging.c b/src/security/intel/cbnt/logging.c
index 514e5ac666..90d138d7c2 100644
--- a/src/security/intel/cbnt/logging.c
+++ b/src/security/intel/cbnt/logging.c
@@ -1,9 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <arch/mmio.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <cpu/intel/msr.h>
+#include <device/mmio.h>
#include <stdint.h>
#include <security/intel/txt/txt.h>
diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c
index 0cde289912..0a277f0744 100644
--- a/src/soc/intel/common/block/smm/smihandler.c
+++ b/src/soc/intel/common/block/smm/smihandler.c
@@ -2,8 +2,6 @@
#include <arch/hlt.h>
#include <arch/io.h>
-#include <arch/mmio.h>
-#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
@@ -12,7 +10,9 @@
#include <cpu/intel/em64t101_save_state.h>
#include <cpu/intel/msr.h>
#include <delay.h>
+#include <device/mmio.h>
#include <device/pci_def.h>
+#include <device/pci_ops.h>
#include <elog.h>
#include <intelblocks/fast_spi.h>
#include <intelblocks/pmclib.h>