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authorAngel Pons <th3fanbus@gmail.com>2020-10-29 18:29:11 +0100
committerLean Sheng Tan <sheng.tan@9elements.com>2024-04-14 20:58:34 +0000
commit81b7c296d300cafcd3810dcea6d65087d15fe5ef (patch)
tree41a7c3508184b6760a40ec95e9b200798b0cef0a /src
parentf58e53601669133b1f23eb2a580171075054418f (diff)
soc/intel/broadwell: Add ACPI CIDs for SerialIO devices
Lynxpoint has them, so add them on Broadwell as well. Change-Id: Iaa3e8044090262a64e58062ec4b116976978ce55 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46973 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/broadwell/pch/acpi/serialio.asl6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/pch/acpi/serialio.asl b/src/soc/intel/broadwell/pch/acpi/serialio.asl
index 183bca6d55..d28fb70930 100644
--- a/src/soc/intel/broadwell/pch/acpi/serialio.asl
+++ b/src/soc/intel/broadwell/pch/acpi/serialio.asl
@@ -166,6 +166,7 @@ Device (I2C0)
// LynxPoint-LP
Return ("INT33C2")
}
+ Name (_CID, "INT33C2")
Name (_UID, 1)
Name (SSCN, Package () { 432, 507, 30 })
@@ -242,6 +243,7 @@ Device (I2C1)
// LynxPoint-LP
Return ("INT33C3")
}
+ Name (_CID, "INT33C3")
Name (_UID, 1)
Name (SSCN, Package () { 432, 507, 30 })
@@ -318,6 +320,7 @@ Device (SPI0)
// LynxPoint-LP
Return ("INT33C0")
}
+ Name (_CID, "INT33C0")
Name (_UID, 1)
// BAR0 is assigned during PCI enumeration and saved into NVS
@@ -379,6 +382,7 @@ Device (SPI1)
// LynxPoint-LP
Return ("INT33C1")
}
+ Name (_CID, "INT33C1")
Name (_UID, 1)
// BAR0 is assigned during PCI enumeration and saved into NVS
@@ -452,6 +456,7 @@ Device (UAR0)
// LynxPoint-LP
Return ("INT33C4")
}
+ Name (_CID, "INT33C4")
Name (_UID, 1)
// BAR0 is assigned during PCI enumeration and saved into NVS
@@ -525,6 +530,7 @@ Device (UAR1)
// LynxPoint-LP
Return ("INT33C5")
}
+ Name (_CID, "INT33C5")
Name (_UID, 1)
// BAR0 is assigned during PCI enumeration and saved into NVS