diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2023-03-21 16:21:43 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-22 17:38:01 +0000 |
commit | 81943646e3a280f04c224982911f66748aeff625 (patch) | |
tree | 1d0f13d4da2f7af06415c01d8711e33c5b9a77ce /src | |
parent | 907b6f54ef8363b5dea404aa57d86eef342ccfb7 (diff) |
soc/amd/*/acpi: assign proper boolean values in get_pstate_core_freq
Assign true/false instead of 1/0 to the valid_freq_divisor bool variable
in get_pstate_core_freq.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I92d0eb029c55f80a2027ff6d404c63ed84282750
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73880
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/amd/cezanne/acpi.c | 6 | ||||
-rw-r--r-- | src/soc/amd/glinda/acpi.c | 6 | ||||
-rw-r--r-- | src/soc/amd/mendocino/acpi.c | 6 | ||||
-rw-r--r-- | src/soc/amd/phoenix/acpi.c | 6 | ||||
-rw-r--r-- | src/soc/amd/picasso/acpi.c | 6 |
5 files changed, 15 insertions, 15 deletions
diff --git a/src/soc/amd/cezanne/acpi.c b/src/soc/amd/cezanne/acpi.c index e250bfb404..8e718ef7b3 100644 --- a/src/soc/amd/cezanne/acpi.c +++ b/src/soc/amd/cezanne/acpi.c @@ -114,13 +114,13 @@ uint32_t get_pstate_core_freq(msr_t pstate_def) } else if ((core_freq_div >= PSTATE_DEF_LO_FREQ_DIV_MIN) && (core_freq_div <= PSTATE_DEF_LO_EIGHTH_STEP_MAX)) { /* Allow 1/8 integer steps for this range */ - valid_freq_divisor = 1; + valid_freq_divisor = true; } else if ((core_freq_div > PSTATE_DEF_LO_EIGHTH_STEP_MAX) && (core_freq_div <= PSTATE_DEF_LO_FREQ_DIV_MAX) && !(core_freq_div & 0x1)) { /* Only allow 1/4 integer steps for this range */ - valid_freq_divisor = 1; + valid_freq_divisor = true; } else { - valid_freq_divisor = 0; + valid_freq_divisor = false; } if (valid_freq_divisor) { diff --git a/src/soc/amd/glinda/acpi.c b/src/soc/amd/glinda/acpi.c index ff3f870fdd..6e837283c8 100644 --- a/src/soc/amd/glinda/acpi.c +++ b/src/soc/amd/glinda/acpi.c @@ -115,13 +115,13 @@ uint32_t get_pstate_core_freq(msr_t pstate_def) } else if ((core_freq_div >= PSTATE_DEF_LO_FREQ_DIV_MIN) && (core_freq_div <= PSTATE_DEF_LO_EIGHTH_STEP_MAX)) { /* Allow 1/8 integer steps for this range */ - valid_freq_divisor = 1; + valid_freq_divisor = true; } else if ((core_freq_div > PSTATE_DEF_LO_EIGHTH_STEP_MAX) && (core_freq_div <= PSTATE_DEF_LO_FREQ_DIV_MAX) && !(core_freq_div & 0x1)) { /* Only allow 1/4 integer steps for this range */ - valid_freq_divisor = 1; + valid_freq_divisor = true; } else { - valid_freq_divisor = 0; + valid_freq_divisor = false; } if (valid_freq_divisor) { diff --git a/src/soc/amd/mendocino/acpi.c b/src/soc/amd/mendocino/acpi.c index 8049f3c86c..f69434f98f 100644 --- a/src/soc/amd/mendocino/acpi.c +++ b/src/soc/amd/mendocino/acpi.c @@ -116,13 +116,13 @@ uint32_t get_pstate_core_freq(msr_t pstate_def) } else if ((core_freq_div >= PSTATE_DEF_LO_FREQ_DIV_MIN) && (core_freq_div <= PSTATE_DEF_LO_EIGHTH_STEP_MAX)) { /* Allow 1/8 integer steps for this range */ - valid_freq_divisor = 1; + valid_freq_divisor = true; } else if ((core_freq_div > PSTATE_DEF_LO_EIGHTH_STEP_MAX) && (core_freq_div <= PSTATE_DEF_LO_FREQ_DIV_MAX) && !(core_freq_div & 0x1)) { /* Only allow 1/4 integer steps for this range */ - valid_freq_divisor = 1; + valid_freq_divisor = true; } else { - valid_freq_divisor = 0; + valid_freq_divisor = false; } if (valid_freq_divisor) { diff --git a/src/soc/amd/phoenix/acpi.c b/src/soc/amd/phoenix/acpi.c index 2b7f592eaa..1e9af9eb26 100644 --- a/src/soc/amd/phoenix/acpi.c +++ b/src/soc/amd/phoenix/acpi.c @@ -115,13 +115,13 @@ uint32_t get_pstate_core_freq(msr_t pstate_def) } else if ((core_freq_div >= PSTATE_DEF_LO_FREQ_DIV_MIN) && (core_freq_div <= PSTATE_DEF_LO_EIGHTH_STEP_MAX)) { /* Allow 1/8 integer steps for this range */ - valid_freq_divisor = 1; + valid_freq_divisor = true; } else if ((core_freq_div > PSTATE_DEF_LO_EIGHTH_STEP_MAX) && (core_freq_div <= PSTATE_DEF_LO_FREQ_DIV_MAX) && !(core_freq_div & 0x1)) { /* Only allow 1/4 integer steps for this range */ - valid_freq_divisor = 1; + valid_freq_divisor = true; } else { - valid_freq_divisor = 0; + valid_freq_divisor = false; } if (valid_freq_divisor) { diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index ce8caa4e51..faff625fd4 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -118,13 +118,13 @@ uint32_t get_pstate_core_freq(msr_t pstate_def) } else if ((core_freq_div >= PSTATE_DEF_LO_FREQ_DIV_MIN) && (core_freq_div <= PSTATE_DEF_LO_EIGHTH_STEP_MAX)) { /* Allow 1/8 integer steps for this range */ - valid_freq_divisor = 1; + valid_freq_divisor = true; } else if ((core_freq_div > PSTATE_DEF_LO_EIGHTH_STEP_MAX) && (core_freq_div <= PSTATE_DEF_LO_FREQ_DIV_MAX) && !(core_freq_div & 0x1)) { /* Only allow 1/4 integer steps for this range */ - valid_freq_divisor = 1; + valid_freq_divisor = true; } else { - valid_freq_divisor = 0; + valid_freq_divisor = false; } if (valid_freq_divisor) { |