diff options
| author | Paul Menzel <paulepanter@users.sourceforge.net> | 2015-10-11 15:48:36 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2016-11-21 22:23:59 +0100 |
| commit | 7f1df8c0c13cf40d2eb74f7b13a3983ba7b3b3f2 (patch) | |
| tree | 298508b78107dc4a2e5b5430021538a4de779789 /src | |
| parent | 1ae3bec08753c9289e4ccdbe191f4ec991922b45 (diff) | |
intel/i82801gx: Reorder spaces in output
Currently, the coreboot log of a Lenovo X60, not having any IDE devices
connected, there is a trailing whitespace in the output.
[…]
PCI: 00:1f.1 init ...
i82801gx_ide: initializing...
PCI: 00:1f.1 init finished in 11 usecs
[…]
Reorder the whitespaces, so they are added when needed.
Change-Id: I640e514c89fe0246a847d1fd088def1c88e864f8
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/11870
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/southbridge/intel/i82801gx/ide.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/intel/i82801gx/ide.c b/src/southbridge/intel/i82801gx/ide.c index ea1a7c014e..f82ea177c2 100644 --- a/src/southbridge/intel/i82801gx/ide.c +++ b/src/southbridge/intel/i82801gx/ide.c @@ -31,7 +31,7 @@ static void ide_init(struct device *dev) /* Get the chip configuration */ config_t *config = dev->chip_info; - printk(BIOS_DEBUG, "i82801gx_ide: initializing... "); + printk(BIOS_DEBUG, "i82801gx_ide: initializing..."); if (config == NULL) { printk(BIOS_ERR, "\ni82801gx_ide: Not mentioned in devicetree.cb!\n"); // Trying to set somewhat safe defaults instead of bailing out. @@ -57,7 +57,7 @@ static void ide_init(struct device *dev) ideTimingConfig |= (3 << 8); // RCT = 1 clock ideTimingConfig |= (1 << 1); // IE0 ideTimingConfig |= (1 << 0); // TIME0 - printk(BIOS_DEBUG, "IDE0 "); + printk(BIOS_DEBUG, " IDE0"); } pci_write_config16(dev, IDE_TIM_PRI, ideTimingConfig); @@ -71,7 +71,7 @@ static void ide_init(struct device *dev) ideTimingConfig |= (3 << 8); // RCT = 1 clock ideTimingConfig |= (1 << 1); // IE0 ideTimingConfig |= (1 << 0); // TIME0 - printk(BIOS_DEBUG, "IDE1 "); + printk(BIOS_DEBUG, " IDE1"); } pci_write_config16(dev, IDE_TIM_SEC, ideTimingConfig); |