diff options
| author | Timofey Komarov <happycorsair@yandex.ru> | 2021-04-27 11:00:10 +0300 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2021-05-01 18:02:59 +0000 |
| commit | 7e7d27bf4b5b846456763c606315521548599005 (patch) | |
| tree | d849e5fc0121f8501fe5e1b0c42ee60d5d7f08f7 /src | |
| parent | ffec879e0787ef1f068e820a3f6770496f694ba4 (diff) | |
soc/intel/skylake: Add microcodes for Coffee Lake CPUs
The Z370, H310C and B365 PCHs use the same silicon as 200-series
PCHs and they are supported by soc/intel/skylake codebase
(not by soc/intel/cannonlake). Mentioned PCHs are meant to be paired
with Coffee Lake CPUs, so add the corresponding microcodes.
Signed-off-by: Timofey Komarov <happycorsair@yandex.ru>
Change-Id: I479c648e40c4c607d29f8cdd913fdbd6d7d7d991
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52693
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/skylake/Kconfig | 3 | ||||
| -rw-r--r-- | src/soc/intel/skylake/Makefile.inc | 7 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 5024ef455b..a8f220f227 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -311,6 +311,9 @@ config MAINBOARD_SUPPORTS_KABYLAKE_CPU bool "Board can contain Kaby Lake CPU" default y if SOC_INTEL_KABYLAKE +config MAINBOARD_SUPPORTS_COFFEELAKE_CPU + bool "Board can contain Coffee Lake CPU" + endif if !SKYLAKE_SOC_PCH_H diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 8dbadcc038..e88eab5340 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -84,6 +84,13 @@ ifeq ($(CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU),y) # Kabylake H B0 S0 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-09 endif +# CoffeeLake +ifeq ($(CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU),y) +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0a +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0b +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0c +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0d +endif else ifeq ($(CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU),y) # Skylake D0 |