diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2022-03-05 10:39:22 +0000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-10 15:07:39 +0000 |
| commit | 7b0239d8cad8160109d5eb5ddcfb0833124166a3 (patch) | |
| tree | f748888e60f14d21a4d913128982559848c1e7df /src | |
| parent | 141e6fd2451c9e8bd13b81b24409db766610d755 (diff) | |
ec/starlabs: Write the correct value for TPLE when suspending
The current code will write the raw value from the CMOS, which doesn't
match the respective setting in EC.
Switch argument will write the correct value, and prevent the setting
being reset.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Iabeec47bf492b698f95d86aa2d08ba9caedd75f6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62607
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/ec/starlabs/merlin/acpi/suspend.asl | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/src/ec/starlabs/merlin/acpi/suspend.asl b/src/ec/starlabs/merlin/acpi/suspend.asl index 81ae8d14f3..0f1c27c210 100644 --- a/src/ec/starlabs/merlin/acpi/suspend.asl +++ b/src/ec/starlabs/merlin/acpi/suspend.asl @@ -82,7 +82,21 @@ Method (RWAK, 1, Serialized) \_SB.PCI0.LPCB.EC.OSFG = 0x01 /* Restore EC settings from CMOS */ - \_SB.PCI0.LPCB.EC.TPLE = \_SB.PCI0.LPCB.TPLC + Switch (ToInteger (\_SB.PCI0.LPCB.TPLC)) + { + // 0x00 == Enabled == 0x00 + // 0x00 == Re-enabled == 0x11 + // 0x01 == Disabled == 0x22 + Case (0x00) + { + \_SB.PCI0.LPCB.EC.TPLE = 0x00 + } + Case (0x01) + { + \_SB.PCI0.LPCB.EC.TPLE = 0x22 + } + } + \_SB.PCI0.LPCB.EC.FLKE = \_SB.PCI0.LPCB.FLKC \_SB.PCI0.LPCB.EC.KLSE = \_SB.PCI0.LPCB.KLSC \_SB.PCI0.LPCB.EC.KLBE = \_SB.PCI0.LPCB.KLBC |