diff options
author | Sean Rhodes <sean@starlabs.systems> | 2022-06-02 11:28:43 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-20 12:02:35 +0000 |
commit | 7a82a805b8b33d97e5208ed74ecf33803f07c736 (patch) | |
tree | 8528e5bd9d50064e96391fd72e6d9369b3ddd4f4 /src | |
parent | d6fb425ca69ae3c36e18c4be5c2a44f9b4fbdcf2 (diff) |
soc/intel/apollolake: Allow configuring the LPC IO registers
Allow configuring the LPC IO registers in the devicetree with:
* gen1_dec
* gen2_dec
* gen3_dec
* gen4_dec
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I2a7ab3faf927cda76640227feff4e19017442897
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64889
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/intel/apollolake/bootblock/bootblock.c | 3 | ||||
-rw-r--r-- | src/soc/intel/apollolake/chip.h | 6 | ||||
-rw-r--r-- | src/soc/intel/apollolake/lpc.c | 11 |
3 files changed, 20 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c index 00c47f3d28..c9b6d93d50 100644 --- a/src/soc/intel/apollolake/bootblock/bootblock.c +++ b/src/soc/intel/apollolake/bootblock/bootblock.c @@ -102,6 +102,9 @@ void bootblock_soc_early_init(void) /* IO Decode Enable */ lpc_enable_fixed_io_ranges(io_enables); + /* Program generic IO Decode Range */ + pch_enable_lpc(); + if (CONFIG(TPM_ON_FAST_SPI)) tpm_enable(); diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h index 2bdabd6e33..209937d775 100644 --- a/src/soc/intel/apollolake/chip.h +++ b/src/soc/intel/apollolake/chip.h @@ -113,6 +113,12 @@ struct soc_intel_apollolake_config { uint16_t lpc_iod; uint16_t lpc_ioe; + /* Generic IO decode ranges */ + uint32_t gen1_dec; + uint32_t gen2_dec; + uint32_t gen3_dec; + uint32_t gen4_dec; + /* Configure LPSS S0ix Enable */ uint8_t lpss_s0ix_enable; diff --git a/src/soc/intel/apollolake/lpc.c b/src/soc/intel/apollolake/lpc.c index 4a5f40f42a..21a0f44963 100644 --- a/src/soc/intel/apollolake/lpc.c +++ b/src/soc/intel/apollolake/lpc.c @@ -5,8 +5,19 @@ #include <intelblocks/rtc.h> #include <soc/pcr_ids.h> #include <soc/pm.h> +#include <soc/intel/common/block/lpc/lpc_def.h> #include "chip.h" +void soc_get_gen_io_dec_range(uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES]) +{ + const config_t *config = config_of_soc(); + + gen_io_dec[0] = config->gen1_dec; + gen_io_dec[1] = config->gen2_dec; + gen_io_dec[2] = config->gen3_dec; + gen_io_dec[3] = config->gen4_dec; +} + void lpc_soc_init(struct device *dev) { const struct soc_intel_apollolake_config *cfg; |