mainboard: Sanitize some superio include paths to be non-local

This brings mainboard up to being consistent tree-wide now for
all superio header path inclusions.

Change-Id: I00a806ce209ba363c62e3ddd49db9bf599f32149
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8052
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

11 files changed, 11 insertions, 11 deletions

diff --git a/src/mainboard/intel/cougar_canyon2/romstage.c b/src/mainboard/intel/cougar_canyon2/romstage.c
index 6580ab9708..7194851634 100644
--- a/src/mainboard/intel/cougar_canyon2/romstage.c
+++ b/src/mainboard/intel/cougar_canyon2/romstage.c
@@ -33,7 +33,7 @@
 #include <console/console.h>
 #include <halt.h>
 #include <reset.h>
-#include "superio/smsc/sio1007/chip.h"
+#include <superio/smsc/sio1007/chip.h>
 #include <fsp_util.h>
 #include "northbridge/intel/fsp_sandybridge/northbridge.h"
 #include "northbridge/intel/fsp_sandybridge/raminit.h"
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index 76edf7fd0d..ffb44a0423 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -30,7 +30,7 @@
 #include <arch/acpi.h>
 #include <cbmem.h>
 #include <console/console.h>
-#include "superio/smsc/sio1007/chip.h"
+#include <superio/smsc/sio1007/chip.h>
 #include "northbridge/intel/sandybridge/sandybridge.h"
 #include "northbridge/intel/sandybridge/raminit.h"
 #include "southbridge/intel/bd82x6x/pch.h"
diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c
index c1ee9bb058..4691b5c0e8 100644
--- a/src/mainboard/intel/mtarvon/romstage.c
+++ b/src/mainboard/intel/mtarvon/romstage.c
@@ -29,7 +29,7 @@
 #include "southbridge/intel/i3100/early_smbus.c"
 #include "southbridge/intel/i3100/early_lpc.c"
 #include "northbridge/intel/i3100/raminit.h"
-#include "superio/intel/i3100/i3100.h"
+#include <superio/intel/i3100/i3100.h>
 #include "superio/intel/i3100/early_serial.c"
 #include "northbridge/intel/i3100/memory_initialized.c"
 #include "cpu/x86/bist.h"
diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c
index 0677cf6940..f75077833c 100644
--- a/src/mainboard/intel/truxton/romstage.c
+++ b/src/mainboard/intel/truxton/romstage.c
@@ -30,7 +30,7 @@
 #include "southbridge/intel/i3100/early_smbus.c"
 #include "southbridge/intel/i3100/early_lpc.c"
 #include "northbridge/intel/i3100/raminit_ep80579.h"
-#include "superio/intel/i3100/i3100.h"
+#include <superio/intel/i3100/i3100.h>
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "superio/intel/i3100/early_serial.c"
 #include "lib/debug.c" // XXX
diff --git a/src/mainboard/lenovo/t60/dock.c b/src/mainboard/lenovo/t60/dock.c
index b01f8e8adf..8052dbc124 100644
--- a/src/mainboard/lenovo/t60/dock.c
+++ b/src/mainboard/lenovo/t60/dock.c
@@ -24,7 +24,7 @@
 #include <arch/io.h>
 #include <delay.h>
 #include "dock.h"
-#include "superio/nsc/pc87384/pc87384.h"
+#include <superio/nsc/pc87384/pc87384.h>
 #include "ec/acpi/ec.h"
 #include "ec/lenovo/pmh7/pmh7.h"
 #include "southbridge/intel/i82801gx/i82801gx.h"
diff --git a/src/mainboard/lenovo/x60/dock.c b/src/mainboard/lenovo/x60/dock.c
index 1f852816e6..1a843d9961 100644
--- a/src/mainboard/lenovo/x60/dock.c
+++ b/src/mainboard/lenovo/x60/dock.c
@@ -26,7 +26,7 @@
 #include <arch/io.h>
 #include "dock.h"
 #include "southbridge/intel/i82801gx/i82801gx.h"
-#include "superio/nsc/pc87392/pc87392.h"
+#include <superio/nsc/pc87392/pc87392.h>
 
 static void dlpc_write_register(int reg, int value)
 {
diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c
index 5b8646a1ce..b356fa81e1 100644
--- a/src/mainboard/samsung/lumpy/romstage.c
+++ b/src/mainboard/samsung/lumpy/romstage.c
@@ -44,7 +44,7 @@
 #include "option_table.h"
 #include "gpio.h"
 #if CONFIG_DRIVERS_UART_8250IO
-#include "superio/smsc/lpc47n207/lpc47n207.h"
+#include <superio/smsc/lpc47n207/lpc47n207.h>
 #include "superio/smsc/lpc47n207/early_serial.c"
 #endif
 #if CONFIG_CHROMEOS
diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c
index f842ad2e49..1462132eba 100644
--- a/src/mainboard/samsung/stumpy/romstage.c
+++ b/src/mainboard/samsung/stumpy/romstage.c
@@ -44,7 +44,7 @@
 #include <halt.h>
 #include "gpio.h"
 #if CONFIG_DRIVERS_UART_8250IO
-#include "superio/smsc/lpc47n207/lpc47n207.h"
+#include <superio/smsc/lpc47n207/lpc47n207.h>
 #include "superio/smsc/lpc47n207/early_serial.c"
 #endif
 #if CONFIG_CHROMEOS
diff --git a/src/mainboard/supermicro/h8qgi/romstage.c b/src/mainboard/supermicro/h8qgi/romstage.c
index 477f1c43c2..c231e31301 100644
--- a/src/mainboard/supermicro/h8qgi/romstage.c
+++ b/src/mainboard/supermicro/h8qgi/romstage.c
@@ -31,7 +31,7 @@
 #include "northbridge/amd/agesa/family10/reset_test.h"
 #include <nb_cimx.h>
 #include <sb_cimx.h>
-#include "superio/nuvoton/wpcm450/wpcm450.h"
+#include <superio/nuvoton/wpcm450/wpcm450.h>
 #include <superio/winbond/common/winbond.h>
 #include <superio/winbond/w83627dhg/w83627dhg.h>
 
diff --git a/src/mainboard/supermicro/h8scm/romstage.c b/src/mainboard/supermicro/h8scm/romstage.c
index 6e7ad70a86..0bbd8bc44d 100644
--- a/src/mainboard/supermicro/h8scm/romstage.c
+++ b/src/mainboard/supermicro/h8scm/romstage.c
@@ -31,7 +31,7 @@
 #include "northbridge/amd/agesa/family10/reset_test.h"
 #include <nb_cimx.h>
 #include <sb_cimx.h>
-#include "superio/nuvoton/wpcm450/wpcm450.h"
+#include <superio/nuvoton/wpcm450/wpcm450.h>
 #include <superio/winbond/common/winbond.h>
 #include <superio/winbond/w83627dhg/w83627dhg.h>
 
diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c
index fdf49d87a8..917e9e3259 100644
--- a/src/mainboard/supermicro/h8scm_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c
@@ -46,7 +46,7 @@
 #include "southbridge/amd/sb700/sb700.h"
 #include "southbridge/amd/sb700/smbus.h"
 #include "southbridge/amd/sr5650/sr5650.h"
-#include "superio/nuvoton/wpcm450/wpcm450.h"
+#include <superio/nuvoton/wpcm450/wpcm450.h>
 #include "northbridge/amd/amdfam10/debug.c"
 
 static void activate_spd_rom(const struct mem_controller *ctrl)