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authorSridahr Siricilla <sridhar.siricilla@intel.com>2021-11-11 01:10:16 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-01-28 15:05:31 +0000
commit73b90c68723b3a138f8fce8c431717222fbf5aa2 (patch)
tree61f6af2ba1d998fa8c5b13663063196516563b4f /src
parent117361278f0e1491d6f745fa19a5f75f0cc73b0a (diff)
soc/intel/alderlake: Enable CPPCv3
The patch defines the following helper functions: get_cpu_scaling_factor(): Returns scaling factors of big and small core. cpu_is_nominal_freq_supported(): Returns true if CPU supports Nominal Frequency, otherwise false. cpu_is_nominal_freq_supported(): Check CPU supports nominal frequency or not. The patch also enables CPPCv3 support for Intel Alder Lake which is based on hybrid core architecture. TEST=Verified Nominal Frequency and Nominal Performance are getting updated for ADL-P small and big cores correctly. Signed-off-by: Sridahr Siricilla <sridhar.siricilla@intel.com> Change-Id: I963690a4fadad322095d202bcc08c92dcd845360 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59362 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/alderlake/Kconfig1
-rw-r--r--src/soc/intel/alderlake/cpu.c11
2 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 04e113a911..ac8c2e3843 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -63,6 +63,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK
select SOC_INTEL_COMMON_BLOCK_ACPI
select SOC_INTEL_COMMON_BLOCK_ACPI_CPPC
+ select SOC_INTEL_COMMON_BLOCK_ACPI_CPU_HYBRID
select SOC_INTEL_COMMON_BLOCK_ACPI_GPIO
select SOC_INTEL_COMMON_BLOCK_ACPI_PEP
select SOC_INTEL_COMMON_BLOCK_ACPI_PEP_LPM_REQ
diff --git a/src/soc/intel/alderlake/cpu.c b/src/soc/intel/alderlake/cpu.c
index b6dc898f4e..3b3a7a281c 100644
--- a/src/soc/intel/alderlake/cpu.c
+++ b/src/soc/intel/alderlake/cpu.c
@@ -90,6 +90,17 @@ enum core_type get_soc_cpu_type(void)
return CPUID_CORE_TYPE_INTEL_CORE;
}
+void soc_get_scaling_factor(u16 *big_core_scal_factor, u16 *small_core_scal_factor)
+{
+ *big_core_scal_factor = 127;
+ *small_core_scal_factor = 100;
+}
+
+bool soc_is_nominal_freq_supported(void)
+{
+ return true;
+}
+
/* All CPUs including BSP will run the following function. */
void soc_core_init(struct device *cpu)
{