summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorSubrata Banik <subratabanik@google.com>2023-04-01 16:32:26 +0530
committerLean Sheng Tan <sheng.tan@9elements.com>2023-04-06 19:33:37 +0000
commit6e911eebc535dd2e70f98e7be9283bf5814cf1c8 (patch)
treef48d2475d80cc0c2f663480bcb3018378c52896f /src
parentfa85b0f37c91e09d8327040c4031703dd159b241 (diff)
soc/intel/meteorlake: Disable 3-strike error
This patch calls into API to disable 3-strike error on Meteor Lake SoC based platform. TEST=Able to build and boot google/rex to ChromeOS. Dumping MSR 0x1A4 shows BIT11 aka 3-strike error is disabled ``` localhost ~ # iotools rdmsr 0 0x1a4 0x0000000000000900 ``` Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I5c33a1fa2d7e27ec8ffdea876edbb86adc3b45b9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74159 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Tarun Tuli <taruntuli@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/meteorlake/cpu.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/meteorlake/cpu.c b/src/soc/intel/meteorlake/cpu.c
index 691f50d0d9..6d64e5bb18 100644
--- a/src/soc/intel/meteorlake/cpu.c
+++ b/src/soc/intel/meteorlake/cpu.c
@@ -139,6 +139,11 @@ void soc_core_init(struct device *cpu)
if (CONFIG(INTEL_TME) && is_tme_supported())
set_tme_core_activate();
+
+ if (CONFIG(DROP_CPU_FEATURE_PROGRAM_IN_FSP)) {
+ /* Disable 3-strike error */
+ disable_three_strike_error();
+ }
}
static void per_cpu_smm_trigger(void)