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authorStefan Reinauer <stefan.reinauer@coreboot.org>2015-07-17 12:13:09 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-07-17 23:05:17 +0200
commit6af48bb7f45cf8584de0e051dd3a1e853fa748ff (patch)
treeb44dcb1218d3a9103f3ffdd690369d790f8a4593 /src
parent1332bb8a84dbfc19eb8a5cac4cd940d93b08d967 (diff)
soc/intel: Remove microcode terminators
They have been removed in the rest of the code already. http://review.coreboot.org/#/c/4506/ Change-Id: I232cc2ccd4dd90359de4ab710486db65667500f4 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/10964 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/fsp_baytrail/microcode/microcode_blob.c6
-rw-r--r--src/soc/intel/skylake/microcode/microcode_blob.h6
2 files changed, 0 insertions, 12 deletions
diff --git a/src/soc/intel/fsp_baytrail/microcode/microcode_blob.c b/src/soc/intel/fsp_baytrail/microcode/microcode_blob.c
index 5d75961482..822c91baf5 100644
--- a/src/soc/intel/fsp_baytrail/microcode/microcode_blob.c
+++ b/src/soc/intel/fsp_baytrail/microcode/microcode_blob.c
@@ -35,10 +35,4 @@ unsigned microcode[] = {
#include "M0C30678829.h" // M0C30678: Bay Trail M D Stepping
#endif /* CONFIG_SOC_INTEL_FSP_BAYTRAIL_MD */
#endif /* CONFIG_HAVE_FSP_BIN */
-
- /* Dummy terminator */
- 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0,
};
diff --git a/src/soc/intel/skylake/microcode/microcode_blob.h b/src/soc/intel/skylake/microcode/microcode_blob.h
index 4bca894446..82a8664d71 100644
--- a/src/soc/intel/skylake/microcode/microcode_blob.h
+++ b/src/soc/intel/skylake/microcode/microcode_blob.h
@@ -19,9 +19,3 @@
*/
#include "MC0406E2_00000017_00000018.h"
-
- /* Dummy terminator */
- 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0,