diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-08-04 13:20:13 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-05 11:36:52 +0000 |
| commit | 6aa9d668739a29ebbaabd435d261f90176a72261 (patch) | |
| tree | dfdc77a0d924c490966a8b9c80b4db0c7f49b8ca /src | |
| parent | 239272e43de7eab15031b8fd3727596d3a23ee82 (diff) | |
src: Use space after switch, while
Change-Id: I150591aa3624895c4c321101a251547dd23d1db5
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44172
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/lenovo/t400/dock.c | 2 | ||||
| -rw-r--r-- | src/mainboard/lenovo/t60/dock.c | 6 | ||||
| -rw-r--r-- | src/mainboard/lenovo/t60/early_init.c | 2 | ||||
| -rw-r--r-- | src/mainboard/lenovo/x60/dock.c | 6 | ||||
| -rw-r--r-- | src/northbridge/intel/x4x/dq_dqs.c | 4 |
5 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/lenovo/t400/dock.c b/src/mainboard/lenovo/t400/dock.c index 5414f8b628..b8163e710b 100644 --- a/src/mainboard/lenovo/t400/dock.c +++ b/src/mainboard/lenovo/t400/dock.c @@ -23,7 +23,7 @@ static int poll_clk_stable(pnp_devfn_t dev, int timeout) { /* Enable 14.318MHz CLK on CLKIN */ pnp_write_config(dev, 0x29, 0xa0); - while(!(pnp_read_config(dev, 0x29) & 0x10) && timeout--) + while (!(pnp_read_config(dev, 0x29) & 0x10) && timeout--) udelay(1000); if (!timeout) return 1; diff --git a/src/mainboard/lenovo/t60/dock.c b/src/mainboard/lenovo/t60/dock.c index 378d673c25..55be0389a4 100644 --- a/src/mainboard/lenovo/t60/dock.c +++ b/src/mainboard/lenovo/t60/dock.c @@ -75,7 +75,7 @@ int dlpc_init(void) /* Enable 14.318MHz CLK on CLKIN */ dlpc_write_register(0x29, 0xa0); - while(!(dlpc_read_register(0x29) & 0x10) && timeout--) + while (!(dlpc_read_register(0x29) & 0x10) && timeout--) udelay(1000); if (!timeout) @@ -102,7 +102,7 @@ static int dock_superio_init(void) /* startup 14.318MHz Clock */ dock_write_register(0x29, 0xa0); /* wait until clock is settled */ - while(!(dock_read_register(0x29) & 0x10) && timeout--) + while (!(dock_read_register(0x29) & 0x10) && timeout--) udelay(1000); if (!timeout) @@ -171,7 +171,7 @@ int dock_connect(void) timeout = 1000; - while(!(inb(DLPC_CONTROL) & 8) && timeout--) + while (!(inb(DLPC_CONTROL) & 8) && timeout--) udelay(1000); if (!timeout) { diff --git a/src/mainboard/lenovo/t60/early_init.c b/src/mainboard/lenovo/t60/early_init.c index ad2c58e26a..0a1ae53b72 100644 --- a/src/mainboard/lenovo/t60/early_init.c +++ b/src/mainboard/lenovo/t60/early_init.c @@ -25,7 +25,7 @@ static void early_superio_config(void) pnp_write_config(dev, 0x29, 0xa0); - while(!(pnp_read_config(dev, 0x29) & 0x10) && timeout--) + while (!(pnp_read_config(dev, 0x29) & 0x10) && timeout--) udelay(1000); /* Enable COM1 */ diff --git a/src/mainboard/lenovo/x60/dock.c b/src/mainboard/lenovo/x60/dock.c index 25c1aace8e..3abe5c1151 100644 --- a/src/mainboard/lenovo/x60/dock.c +++ b/src/mainboard/lenovo/x60/dock.c @@ -72,7 +72,7 @@ int dlpc_init(void) /* Enable 14.318MHz CLK on CLKIN */ dlpc_write_register(0x29, 0xa0); - while(!(dlpc_read_register(0x29) & 0x10) && timeout--) + while (!(dlpc_read_register(0x29) & 0x10) && timeout--) udelay(1000); if (!timeout) @@ -99,7 +99,7 @@ int dock_connect(void) timeout = 1000; - while(!(inb(0x164c) & 8) && timeout--) + while (!(inb(0x164c) & 8) && timeout--) udelay(1000); if (!timeout) { @@ -121,7 +121,7 @@ int dock_connect(void) dock_write_register(0x29, 0x06); /* wait until clock is settled */ timeout = 1000; - while(!(dock_read_register(0x29) & 0x08) && timeout--) + while (!(dock_read_register(0x29) & 0x08) && timeout--) udelay(1000); if (!timeout) diff --git a/src/northbridge/intel/x4x/dq_dqs.c b/src/northbridge/intel/x4x/dq_dqs.c index dda41744ae..52166ed7e0 100644 --- a/src/northbridge/intel/x4x/dq_dqs.c +++ b/src/northbridge/intel/x4x/dq_dqs.c @@ -220,7 +220,7 @@ static int find_dq_limit(const struct sysinfo *s, const u8 channel, expected_result == FAILING ? "failing" : "succeeding", channel); memset(pass_count, 0, sizeof(pass_count)); - while(succes_mask) { + while (succes_mask) { test_result = test_dq_aligned(s, channel); FOR_EACH_BYTELANE(lane) { if (((test_result >> lane) & 1) != expected_result) { @@ -390,7 +390,7 @@ static int rt_find_dqs_limit(struct sysinfo *s, u8 channel, FOR_EACH_BYTELANE(lane) rt_set_dqs(channel, lane, 0, &dqs_setting[lane]); - while(status == CB_SUCCESS) { + while (status == CB_SUCCESS) { test_result = test_dqs_aligned(s, channel); if (test_result == (expected_result == SUCCEEDING ? 0 : 0xff)) return CB_SUCCESS; |