diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-02-06 13:47:58 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-02-08 11:01:21 +0000 |
| commit | 667108199a04972ebd83c8a0430f2dddd6009879 (patch) | |
| tree | fecdb7e0a6ab66b7f9bcf9074078fbbc4a78dd8f /src | |
| parent | a1024ac933e74fa2c607e991be4ee705215f563d (diff) | |
cpu/intel/model_1067x: Check for lock bit on IA32_FEATURE_CONTROL
df7aecd "cpu/intel: Configure IA32_FEATURE_CONTROL for alternative
SMRR" introduced a regression because it unconditionally writes to
IA32_FEATURE_CONTROL, which if it is already locked results in an
unhandled exception. The lock bit is already set on a system reboot.
Change-Id: I7d2df9e1b9d767809da7a61ccd877c6c40f132eb
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/31255
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Bill XIE <persmule@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/cpu/intel/model_1067x/mp_init.c | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/src/cpu/intel/model_1067x/mp_init.c b/src/cpu/intel/model_1067x/mp_init.c index ab7785989d..acd56c82a8 100644 --- a/src/cpu/intel/model_1067x/mp_init.c +++ b/src/cpu/intel/model_1067x/mp_init.c @@ -60,11 +60,19 @@ static void per_cpu_smm_trigger(void) /* We don't care if the lock is already setting as our smm relocation handler is able to handle setups where SMRR is not enabled here. */ - if (!IS_ENABLED(CONFIG_SET_IA32_FC_LOCK_BIT)) - printk(BIOS_INFO, - "Overriding CONFIG_SET_IA32_FC_LOCK_BIT to enable SMRR\n"); - ia32_ft_ctrl.lo |= (1 << 3) | (1 << 0); - wrmsr(IA32_FEATURE_CONTROL, ia32_ft_ctrl); + if (ia32_ft_ctrl.lo & (1 << 0)) { + /* IA32_FEATURE_CONTROL locked. If we set it again we + get an illegal instruction. */ + printk(BIOS_DEBUG, "IA32_FEATURE_CONTROL already locked\n"); + printk(BIOS_DEBUG, "SMRR status: %senabled\n", + ia32_ft_ctrl.lo & (1 << 3) ? "" : "not "); + } else { + if (!IS_ENABLED(CONFIG_SET_IA32_FC_LOCK_BIT)) + printk(BIOS_INFO, + "Overriding CONFIG_SET_IA32_FC_LOCK_BIT to enable SMRR\n"); + ia32_ft_ctrl.lo |= (1 << 3) | (1 << 0); + wrmsr(IA32_FEATURE_CONTROL, ia32_ft_ctrl); + } } else { set_vmx_and_lock(); } |