diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-08-29 11:26:41 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-06 19:11:12 +0000 |
commit | 6649b1750eba2b7c2f26d5c6e70571718eec3785 (patch) | |
tree | b075766821d91ccb130b7e34a0330c12e924f99e /src | |
parent | b99137bf70368607bd60ef31f8dc506d5adc952d (diff) |
mb/intel: Drop unused `GPIO_MEM_CONFIG_.` defines
These defines are copy-paste leftovers from Kunimitsu. However, neither
Saddle Brook nor KBLRVP use memory-down, so drop the unneeded defines.
Change-Id: I396aeaa634f619be7be0ee97c0cab1c682f53ff2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57231
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/intel/kblrvp/variants/rvp11/include/variant/gpio.h | 6 | ||||
-rw-r--r-- | src/mainboard/intel/saddlebrook/gpio.h | 6 |
2 files changed, 0 insertions, 12 deletions
diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/gpio.h b/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/gpio.h index 354a4ff157..fe8c2e210c 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/gpio.h +++ b/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/gpio.h @@ -24,12 +24,6 @@ /* BIOS Flash Write Protect */ #define GPIO_PCH_WP GPP_C23 -/* Memory configuration board straps */ -#define GPIO_MEM_CONFIG_0 GPP_C12 -#define GPIO_MEM_CONFIG_1 GPP_C13 -#define GPIO_MEM_CONFIG_2 GPP_C14 -#define GPIO_MEM_CONFIG_3 GPP_C15 - /* EC wake is LAN_WAKE# which is a special DeepSX wake pin */ #define GPE_EC_WAKE GPE0_LAN_WAK diff --git a/src/mainboard/intel/saddlebrook/gpio.h b/src/mainboard/intel/saddlebrook/gpio.h index a574ac589d..f60515b8ec 100644 --- a/src/mainboard/intel/saddlebrook/gpio.h +++ b/src/mainboard/intel/saddlebrook/gpio.h @@ -12,12 +12,6 @@ /* BIOS Flash Write Protect */ #define GPIO_PCH_WP GPP_C23 -/* Memory configuration board straps */ -#define GPIO_MEM_CONFIG_0 GPP_C12 -#define GPIO_MEM_CONFIG_1 GPP_C13 -#define GPIO_MEM_CONFIG_2 GPP_C14 -#define GPIO_MEM_CONFIG_3 GPP_C15 - /* EC wake is LAN_WAKE# which is a special DeepSX wake pin */ #define GPE_EC_WAKE GPE0_LAN_WAK |