diff options
| author | Aseda Aboagye <aaboagye@google.com> | 2021-06-17 12:10:33 -0700 |
|---|---|---|
| committer | Karthik Ramasubramanian <kramasub@google.com> | 2021-06-19 00:06:41 +0000 |
| commit | 633560568d5cc24da52f1089f0ae4ca362f7de2f (patch) | |
| tree | c2fee280ebda2cd1c248d88af6d5540c3cf4cee4 /src | |
| parent | 4291c82ac0a27a803d3229114c56e5442bd0945c (diff) | |
soc/intel/common/block/smm: Add `mainboard_smi_finalize`
This commit adds a method called `mainboard_smi_finalize` which provides
a mechanism for a mainboard to execute some code as part of the finalize
method in the SMM stage before SoC does its finalization.
BUG=b:191189275
BRANCH=None
TEST=Implement `mainboard_smi_finalize` on lalala and verify that the
code executes in SMM.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: If1ee63431e3c2a5831a4656c3a361229acff3f42
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55649
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/cpu/x86/smm/smihandler.c | 1 | ||||
| -rw-r--r-- | src/cpu/x86/smm/smm_module_handler.c | 1 | ||||
| -rw-r--r-- | src/include/cpu/x86/smm.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/common/block/smm/smihandler.c | 7 |
4 files changed, 10 insertions, 0 deletions
diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c index 0d9131e429..0b262afaa9 100644 --- a/src/cpu/x86/smm/smihandler.c +++ b/src/cpu/x86/smm/smihandler.c @@ -208,3 +208,4 @@ void __weak southbridge_smi_handler(void) {} void __weak mainboard_smi_gpi(u32 gpi_sts) {} int __weak mainboard_smi_apmc(u8 data) { return 0; } void __weak mainboard_smi_sleep(u8 slp_typ) {} +void __weak mainboard_smi_finalize(void) {} diff --git a/src/cpu/x86/smm/smm_module_handler.c b/src/cpu/x86/smm/smm_module_handler.c index 0c0de78b21..f9ebba4e32 100644 --- a/src/cpu/x86/smm/smm_module_handler.c +++ b/src/cpu/x86/smm/smm_module_handler.c @@ -198,3 +198,4 @@ void __weak southbridge_smi_handler() {} void __weak mainboard_smi_gpi(u32 gpi_sts) {} int __weak mainboard_smi_apmc(u8 data) { return 0; } void __weak mainboard_smi_sleep(u8 slp_typ) {} +void __weak mainboard_smi_finalize(void) {} diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index 1b4de2571a..08404d0320 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -49,6 +49,7 @@ void southbridge_smi_handler(void); void mainboard_smi_gpi(u32 gpi_sts); int mainboard_smi_apmc(u8 data); void mainboard_smi_sleep(u8 slp_typ); +void mainboard_smi_finalize(void); /* This is the SMM handler. */ extern unsigned char _binary_smm_start[]; diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c index ff87d71e4f..91142a51ce 100644 --- a/src/soc/intel/common/block/smm/smihandler.c +++ b/src/soc/intel/common/block/smm/smihandler.c @@ -320,6 +320,13 @@ static void finalize(void) /* Re-init SPI driver to handle locked BAR */ fast_spi_init(); + /* + * HECI is disabled in smihandler_soc_at_finalize() which also locks down the side band + * interface. Some boards may require this interface in mainboard_smi_finalize(), + * therefore, this call must precede smihandler_soc_at_finalize(). + */ + mainboard_smi_finalize(); + /* Specific SOC SMI handler during ramstage finalize phase */ smihandler_soc_at_finalize(); } |