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authorVadim Bendebury <vbendeb@chromium.org>2014-12-12 17:54:27 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-07-09 00:11:37 +0200
commit62b4de13c656d5a773d78a35192d560c2216d669 (patch)
tree1319ae2cef9943ab12ff25e79e1c65c0b51efee2 /src
parentbf27391da5b12f53444a9e678bcfb912f88e30e4 (diff)
ipq8064: enable timestamp collection
One kilobyte of SRAM needs to be allocated and the feature enabled. BRANCH=storm BUG=chrome-os-partner:34161 TEST=timer error messages do not show up in the coreboot log any more Change-Id: I1d5e5521bf9ae495d4f4f50ff017c846a8420719 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: ffb9bfb0cdfab1391f8ae07669a2ab6b24d88dd7 Original-Change-Id: I60066672334db36f5e7adbef6794d7afd177d292 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/235893 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/10847 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/qualcomm/ipq806x/Kconfig1
-rw-r--r--src/soc/qualcomm/ipq806x/include/soc/memlayout.ld3
2 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig
index ecc52e20f2..9a1e4f99d9 100644
--- a/src/soc/qualcomm/ipq806x/Kconfig
+++ b/src/soc/qualcomm/ipq806x/Kconfig
@@ -7,6 +7,7 @@ config SOC_QC_IPQ806X
select ARCH_RAMSTAGE_ARMV7
select BOOTBLOCK_CONSOLE
select CHROMEOS_VBNV_FLASH
+ select HAS_PRECBMEM_TIMESTAMP_REGION
select HAVE_UART_SPECIAL
select SPI_ATOMIC_SEQUENCING
select GENERIC_GPIO_LIB
diff --git a/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld b/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld
index 426d35b844..cf417bac31 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld
+++ b/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld
@@ -34,8 +34,9 @@ SECTIONS
OVERLAP_VERSTAGE_ROMSTAGE(0x2A012000, 64K)
VBOOT2_WORK(0x2A022000, 16K)
PRERAM_CBMEM_CONSOLE(0x2A026000, 32K)
+ TIMESTAMP(0x2A02E000, 1K)
-/* 0x2e400..0x3F000 67KB free */
+/* 0x2e400..0x3F000 67 KB free */
/* Keep the below area reserved at all times, it is used by various QCA
components as shared data