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authorTim Crawford <tcrawford@system76.com>2022-05-25 12:36:47 -0600
committerMartin L Roth <gaumless@tutanota.com>2022-05-28 03:40:45 +0000
commit59609784f0fc36296fc198228b912e7609c8a3e9 (patch)
tree5ff0300e71fe70eeaaffddf148236a585a5a78e1 /src
parent32e72ca0b74f3ebd8124d4a62a3f6777b6aba428 (diff)
soc/intel/tgl: Add PEG devices to PCI constraints
Based on the constraints for CML. Fixes the following warnings in Linux on system76/oryp8 and system76/gaze16, which have an NVIDIA GPU on the bridge. pcieport 0000:00:01.0: can't derive routing for PCI INT A pcieport 0000:00:01.0: can't derive routing for PCI INT B This, in turn, resolves an IRQ conflict with the PCH HDA device that would cause a stack trace on every boot and on S3 suspend. irq 10: nobody cared (try booting with the "irqpoll" option) <snip> [<00000000fb84c354>] azx_interrupt [snd_hda_codec] Disabling IRQ #10 Change-Id: Ibc968aaa7bf0259879097ff69d2543dcfa2e5e4b Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64671 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/tigerlake/fsp_params.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c
index 1cf3d2fee8..e3c7879902 100644
--- a/src/soc/intel/tigerlake/fsp_params.c
+++ b/src/soc/intel/tigerlake/fsp_params.c
@@ -94,6 +94,14 @@ static void parse_devicetree(FSP_S_CONFIG *params)
*/
static const struct slot_irq_constraints irq_constraints[] = {
{
+ .slot = SA_DEV_SLOT_PEG,
+ .fns = {
+ FIXED_INT_PIRQ(SA_DEVFN_PEG1, PCI_INT_A, PIRQ_A),
+ FIXED_INT_PIRQ(SA_DEVFN_PEG2, PCI_INT_B, PIRQ_B),
+ FIXED_INT_PIRQ(SA_DEVFN_PEG3, PCI_INT_C, PIRQ_C),
+ },
+ },
+ {
.slot = SA_DEV_SLOT_IGD,
.fns = {
ANY_PIRQ(SA_DEVFN_IGD),