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authorElyes HAOUAS <ehaouas@noos.fr>2022-01-22 19:18:51 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-01-27 14:51:24 +0000
commit58e2c50d88574492ab0cb19c2bb32fbc2738b591 (patch)
treefd82b74c78780616a98f3c3abf2eaa697100db9d /src
parentbe35479f91a95356d4ff66b77464c1e262052c5c (diff)
cpu/intel/socket_m: Drop 'select SSE'
SSE is already slected by SSE2 through model_6{e,f}x/Kconfig Change-Id: Ibe215cfe6aa6d7c215dd62e1ab2966d079c2a78d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61318 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/cpu/intel/socket_m/Kconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/intel/socket_m/Kconfig b/src/cpu/intel/socket_m/Kconfig
index 50eb7e3f0c..4e74eb4fad 100644
--- a/src/cpu/intel/socket_m/Kconfig
+++ b/src/cpu/intel/socket_m/Kconfig
@@ -8,7 +8,6 @@ config SOCKET_SPECIFIC_OPTIONS
select CPU_INTEL_MODEL_6EX
select CPU_INTEL_MODEL_6FX
select MMX
- select SSE
config DCACHE_RAM_BASE
hex