diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2024-08-31 11:34:17 +0200 |
|---|---|---|
| committer | Elyes Haouas <ehaouas@noos.fr> | 2024-09-04 01:19:40 +0000 |
| commit | 589d34732bf38b4b25666e3c6a936a276c08948a (patch) | |
| tree | 9606eba96ddfc7d8bc863028f7a182f066533bcd /src | |
| parent | db380e53ed24280c9544bd93f59fcac21c3d3902 (diff) | |
tree: Use boolean for emmc_enable_hs400_mode
Change-Id: I41a877ed7f5f3d02904dc939b32996a7f6d45373
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84165
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Diffstat (limited to 'src')
4 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb index bd5cd8bc0b..5ba10eed9f 100644 --- a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb @@ -40,7 +40,7 @@ chip soc/intel/alderlake register "cnvi_bt_core" = "true" # eMMC HS400 - register "emmc_enable_hs400_mode" = "1" + register "emmc_enable_hs400_mode" = "true" #eMMC DLL tuning parameters #Adding the intermediate eMMC DLL tuning override values diff --git a/src/mainboard/google/brya/variants/orisa/overridetree.cb b/src/mainboard/google/brya/variants/orisa/overridetree.cb index 99f754bb3a..26b8c1d2f9 100644 --- a/src/mainboard/google/brya/variants/orisa/overridetree.cb +++ b/src/mainboard/google/brya/variants/orisa/overridetree.cb @@ -35,7 +35,7 @@ chip soc/intel/alderlake register "cnvi_bt_core" = "true" # eMMC HS400 - register "emmc_enable_hs400_mode" = "1" + register "emmc_enable_hs400_mode" = "true" #eMMC DLL tuning parameters # EMMC Tx CMD Delay diff --git a/src/mainboard/google/brya/variants/trulo/overridetree.cb b/src/mainboard/google/brya/variants/trulo/overridetree.cb index c5d636867d..ae18a0f101 100644 --- a/src/mainboard/google/brya/variants/trulo/overridetree.cb +++ b/src/mainboard/google/brya/variants/trulo/overridetree.cb @@ -35,7 +35,7 @@ chip soc/intel/alderlake register "cnvi_bt_core" = "true" # eMMC HS400 - register "emmc_enable_hs400_mode" = "1" + register "emmc_enable_hs400_mode" = "true" #eMMC DLL tuning parameters # EMMC Tx CMD Delay diff --git a/src/mainboard/intel/adlrvp/devicetree_n.cb b/src/mainboard/intel/adlrvp/devicetree_n.cb index c01613c296..db859a1450 100644 --- a/src/mainboard/intel/adlrvp/devicetree_n.cb +++ b/src/mainboard/intel/adlrvp/devicetree_n.cb @@ -20,7 +20,7 @@ chip soc/intel/alderlake register "dptf_enable" = "1" # eMMC HS400 - register "emmc_enable_hs400_mode" = "1" + register "emmc_enable_hs400_mode" = "true" register "usb2_ports[0]" = "USB2_PORT_MID(OC3)" # Type-C Port1 register "usb2_ports[1]" = "USB2_PORT_MID(OC3)" # Type-C Port2 |