diff options
| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2021-12-02 09:48:44 +0530 |
|---|---|---|
| committer | Patrick Georgi <patrick@coreboot.org> | 2021-12-06 12:32:41 +0000 |
| commit | 57ff302a6cfffa29e1a611901e5671fa5a1e1b26 (patch) | |
| tree | 2428524362d355b29595d94181c13b18bf0e9186 /src | |
| parent | 7424576e4183112c7a902925cbde5919b1f2c689 (diff) | |
soc/intel/common: Refactor cpu_set_p_state_to_max_non_turbo_ratio
The patch refectors cpu_set_p_state_to_max_non_turbo_ratio(). The
function is updated to use cpu_get_max_non_turbo_ratio().
TEST=Build the code for Brya
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: If73df17faaf7b870ae311460a868d52352683c0c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59789
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/common/block/cpu/cpulib.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index 617968a1bc..27ff8cd151 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -137,11 +137,10 @@ void cpu_set_p_state_to_nominal_tdp_ratio(void) */ void cpu_set_p_state_to_max_non_turbo_ratio(void) { - msr_t msr, perf_ctl; + msr_t perf_ctl; /* Platform Info bits 15:8 give max ratio */ - msr = rdmsr(MSR_PLATFORM_INFO); - perf_ctl.lo = msr.lo & 0xff00; + perf_ctl.lo = (cpu_get_max_non_turbo_ratio() << 8) & 0xff00; perf_ctl.hi = 0; set_perf_control_msr(perf_ctl); |